- Aug 07, 2018
-
-
Gary Bisson authored
cnt: add defconfig for 1GB of RAM version cnt: fix boot devs configuration cnt: update to v2017.01 cnt: update to v2017.03 cnt.h: add custom BOOT_TARGET_DEVICES priority Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com> cnt: print ethernet phy name (AR8035) cnt.h: CONFIG_IPUV3_CLK 264000000 cnt: use nitrogen6x clock.cfg/ddr-setup.cfg cnt: add CONFIG_CMD_GPIO cnt: explicit fbp_detect_i2c cnt: verify port in board_ehci_hcd_init cnt: preboot_keys is not defined, remove call cnt: use boundary.h cnt: add CONFIG_SPI_FLASH_SPANSION cnt: 1066mhz_4x256mx16.cfg: update calibration for new spin of board cnt: cnt1g_defconfig add CONFIG_BLOCK_CACHE cnt2g: cnt2g_defconfig add CONFIG_BLOCK_CACHE cnt: 1066mhz_4x256mx16.cfg: increase cycles for tFAW/tRRD cnt2g: change ddr to 500.21 MHz cnt: use common code for eth init cnt: eth.c now in common directory cnt: move misc_init_r/do_kbd to common cnt: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common cnt: use common 1066mhz_4x256mx16.cfg cnt: use common 1066mhz_4x128mx16.cfg cnt: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs cnt: use common ddr scripts cnt: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
-
Troy Kisky authored
cid_tab: delay 3P7V rail turn on cid_tab: turn off boost before poweroff cid_tab: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs cid_tab: tamper support checking TAMPER pin cid_tab: use common ddr script cid_tab: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com> cid_tab: fix TP74 pad configuration cid_tab: add key combination to start fastboot cid_tab_q2g_defconfig: reduce bootdelay to 0 cid_tab: limit boot sequence to eMMC Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com>
-
Gary Bisson authored
cid_2g_defconfig: reduce bootdelay to 0 cid: limit boot sequence to eMMC cid: start fastboot when power and reset are pressed Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com> cid: correct touchscreen interrupt pad cid: return 0 from board_eth_init to silence warning cid: use common code for eth init cid: eth.c now in common directory cid: move misc_init_r/do_kbd to common cid: add poweroff/ max77823_init cid: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common cid: document main power on, gpio8 cid: add/correct a few pins cid: fix add/correct a few pins, typo cid: use max77823_otg_power to enable otg power cid: calibration for 2G board based on 6 boards cid: disable vibrator cid: fix gpio numbers GP_ECSPI2_CS/GP_SIM_DETECT cid: use common 1066mhz_4x256mx16.cfg cid: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs cid: tamper support for new board cid: restore accidental removal of cmd_custom cid: turn on blue(LED1), off green/red LED2/3 cid: enable usbh1 vbus in 'usb start' cid: use common ddr script cid: use max77823_is_charging to set leds cid: add cid2_q2g_defconfig for green led polarity change cid: turn on blue led only cid: flash red led twice before poweroff cid: add board_power_check cid: implement vibrator feedback at power on reset cid: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
-
Troy Kisky authored
cad.h: CONFIG_IPUV3_CLK 264000000 cad: add CONFIG_CMD_GPIO cad: explicit fbp_detect_i2c cad: use VDF_SPI_QVGA cad: use boundary.h cad: setup rgb_gpio_pads in board_early_init_f cad: add CONFIG_SPI_FLASH_SPANSION cad: cad_defconfig add CONFIG_BLOCK_CACHE cad: use common code for eth init cad: eth.c now in common directory cad: move misc_init_r/do_kbd to common cad: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common cad: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs cad: use common ddr script cad: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com> cad: update to v2017.01 cad: update to v2017.03 Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com>
-
Troy Kisky authored
bt2: GPS is thru i2c now bt2: swap J6/J7 bt2: rename J6/J7 - J5V/J12v bt2: use nitrogen6x clock.cfg/ddr-setup.cfg bt2: 1066mhz_4x512mx16.cfg, remove confusing comment bt2: add/use 1066mhz_4x512mx16-r0.cfg for 4G memory option bt2: add CONFIG_CMD_GPIO bt2: explicit fbp_detect_i2c bt2: add wlmac bt2: increase refresh rate for 4G-rank0 bt2: setup rgb_gpio_pads in board_early_init_f bt2: add CONFIG_SPI_FLASH_SPANSION bt2: bt2_2g_defconfig add CONFIG_BLOCK_CACHE bt2_4g: bt2_4g_defconfig add CONFIG_BLOCK_CACHE bt2: use common code for eth init bt2: eth.c now in common directory bt2: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common bt2: use common 1066mhz_4x256mx16.cfg bt2: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs bt2: use common ddr scripts bt2: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com> bt2: update to v2017.01 bt2: update to v2017.03 bt2: move misc_init_r/do_kbd to common Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com>
-
Troy Kisky authored
Two configurations bt2g and bt4g for two different memory layouts bt.h: CONFIG_IPUV3_CLK 264000000 bt: rename J6/J7 to J12V/J5V bt: use nitrogen6x clock.cfg/ddr-setup.cfg bt: add CONFIG_CMD_GPIO bt: explicit fbp_detect_i2c bt: use boundary.h bt: add CONFIG_SPI_FLASH_SPANSION bt.h: use BD_CMA to specify cma= on cmd_line bt: bt2g_defconfig add CONFIG_BLOCK_CACHE bt4g: bt4g_defconfig add CONFIG_BLOCK_CACHE bt: use common code for eth init bt: eth.c now in common directory bt: move misc_init_r/do_kbd to common bt: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common bt: use common 1066mhz_4x256mx16.cfg bt: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs bt: use common ddr scripts bt: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com> bt: update to v2017.01 bt: update to v2017.03 Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com>
-
Troy Kisky authored
ash2: KEY_COL0 must be UART4_TX_DATA ash2: add power_init_board because mdelay cannot be used in board_early_init_f ash2: use common 800mhz_4x128mx16.cfg, and calibrate ddr ash2: rgb24 vs rgb66 panel have different backlight active levels ash2: fixup dtb backlight levels ash2: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs ash2: use common ddr script ash2: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
-
Troy Kisky authored
ash: add poweroff command ash: fix some input gpios(CH_ON_RBL/SG_ON_RBL/DOOR_CLOSED ash: use nitrogen6x/clock.cfg ash: use nitrogen6x ddr-setup.cfg ash: remove micrel phy references(only atheros on this board) ash: add CONFIG_CMD_GPIO ash: set rgb_gpio_pads ash: TP86 becomes lvds backlight enable ash: explicit fbp_detect_i2c ash: default uart1 to rs232 ash: use 800mhz for memory ash: use boundary.h ash: GP_BSL_CB_ON_OFF high, TX23D200_18 default dispay ash: add CONFIG_VIDEO_SKIP_VERSION ash: GP_BSL_CB_ON_OFF default to low again ash: add EIM_EB2 for sd card power control ash: add CONFIG_SPI_FLASH_SPANSION ash: ash_defconfig add CONFIG_BLOCK_CACHE ash: use common code for eth init ash: eth.c now in common directory ash: move misc_init_r/do_kbd to common ash: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common ash: gpio3 is power off, don't redefine ash: add power_init_board because mdelay cannot be used in board_early_init_f ash: use common 800mhz_4x128mx16.cfg ash: rgb24 vs rgb66 panel have different backlight active levels ash: fixup dtb backlight levels ash: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs ash: use common ddr script ash: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com> ash: update to v2017.01 ash: update to v2017.03 Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com>
-
Troy Kisky authored
ap: forgot file include/configs/ap.h ap: ap_q2g_defconfig: add CONFIG_SPI_FLASH_GIGADEVICE ap: add bootscript_lp8860_eprom.txt ap: add verification to bootscript_lp8860_eprom.txt ap: use common ddr script ap: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
-
Gary Bisson authored
acl: update to v2017.01 acl update to v2017.03 acl: fix scanner gpios initialization Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com> acl: acl_q2g_defconfig add CONFIG_BLOCK_CACHE acl_s512m: acl_s512m_defconfig add CONFIG_BLOCK_CACHE acl: use common code for eth init acl: eth.c now in common directory acl: move misc_init_r/do_kbd to common acl: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common acl: calibrate 512m Solo board acl: use common 1066mhz_4x256mx16.cfg acl: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs acl: 800mhz_2x128mx16.cfg: remove _P1 accesses acl: 800mhz_2x128mx16.cfg: use common values CFG0: 0x40435323 to 0x3f435333 tRFC - 65 to 64 clocks tFAW - 19 to 20 clocks CFG1: 0xB66E8D63 to 0xb68e8b63 tRC from 20 to 21 clocks tWR from 7 to 6 clocks MR0: 0x13208030 to 0x15208030 tWR from 5 to 6 clocks acl: use common ddr scripts acl: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
-
Gary Bisson authored
ys: update to v2017.01 ys: update to v2017.03 Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com> ys: ys_1g_defconfig add CONFIG_BLOCK_CACHE ys_512m: ys_512m_defconfig add CONFIG_BLOCK_CACHE ys: use common code for eth init ys: eth.c now in common directory ys: move misc_init_r/do_kbd to common ys: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common ys: don't define CONFIG_CMD_FBPANEL, no display ys: keep GP_RESET_DSP_N high ys: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs ys: add CONFIG_SPI_FLASH_WINBOND ys: fix eMMC voltage vccq to allows 1.8V ys: add comment for ddr ys: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
-
Troy Kisky authored
a: add usb hub reset/uart3/uart4/flexcan pins a: keep USB Huawei Modem in reset a: add leds rx active/tx active a: remove printf of board_mmc_init a.h: add cmd_custom to avoid update u-boot warning a: add CONFIG_CMD_GPIO a: remove redundant CONFIG_CMD_GPIO a: verify port in board_ehci_hcd_init a: use boundary.h a: call preboot_keys a: add CONFIG_SPI_FLASH_SPANSION a: add RV4162 rtc on I2C2 a: a_defconfig add CONFIG_BLOCK_CACHE a: use common code for eth init a: eth.c now in common directory a: move misc_init_r/do_kbd to common a: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common a: add CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs a: add a_s512m.cfg a: port to v2018.07 Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com> a: update to v2017.01 a: update to v2017.03 a.h: add custom BOOT_TARGET_DEVICES priority Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com>
-
- May 18, 2018
-
-
Jagan Teki authored
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support for it through DM_PMIC dt definition. pmic log: Reviewed-by:
Stefano Babic <sbabic@denx.de> ======== => pmic list | Name | Parent name | Parent uclass @ seq | pfuze100@08 | i2c@021f8000 | i2c @ 3 => pmic dev pfuze100@08 dev: 0 @ pfuze100@08 => pmic dump Dump pmic: pfuze100@08 registers 0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81 0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00 0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b 0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08 0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00 0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10 0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Simone CIANNI <simone.cianni@bticino.it> Signed-off-by:
Raffaele RECALCATI <raffaele.recalcati@bticino.it>
-
Jagan Teki authored
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support through DM_I2C with dt definition. i2c log: Reviewed-by:
Stefano Babic <sbabic@denx.de> ======= => i2c bus Bus 2: i2c@021a8000 Bus 3: i2c@021f8000 => i2c dev 2 Setting bus to 2 => i2c speed 400000 Setting bus speed to 400000 Hz => i2c probe Valid chip addresses: 20 51 53 => i2c md 53 0xff 00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ => i2c md 51 0xff 00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S => i2c dev 3 Setting bus to 3 => i2c speed 100000 Setting bus speed to 100000 Hz => i2c probe Valid chip addresses: 08 40 48 4B => i2c md 08 0xff 00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Simone CIANNI <simone.cianni@bticino.it> Signed-off-by:
Raffaele RECALCATI <raffaele.recalcati@bticino.it>
-
Jagan Teki authored
Add initial support for i.MX6DL BTicino Mamoj board. Mamoh board added: - SPL - SPL_DM - SPL_OF_CONTROL - DM for U-Boot proper - OF_CONTROL for U-Boot proper - eMMC - FEC - Boot from eMMC - Boot from USB SDP Signed-off-by:
Simone CIANNI <simone.cianni@bticino.it> Signed-off-by:
Raffaele RECALCATI <raffaele.recalcati@bticino.it> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com>
-
- May 17, 2018
-
-
Peter Robinson authored
It makes sense to select the MP multi processor option at the same time we select the other SMP options needed for SMP capable i.MX6 SoCs. Signed-off-by:
Peter Robinson <pbrobinson@gmail.com>
-
Ian Ray authored
This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3. The boards are identified automatically at runtime. Signed-off-by:
Ian Ray <ian.ray@ge.com> Signed-off-by:
Nandor Han <nandor.han@ge.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk>
-
- Apr 26, 2018
-
-
Sébastien Szymanski authored
Since commit commit 152038ea ("i.MX6UL: icore: Add SPL_OF_CONTROL support") the OPOS6UL board doesn't boot anymore. Adding SPL_DM support makes the board boot again. Fixes: commit 152038ea ("i.MX6UL: icore: Add SPL_OF_CONTROL support") Signed-off-by:
Sébastien Szymanski <sebastien.szymanski@armadeus.com>
-
- Apr 15, 2018
-
-
Lukasz Majewski authored
This commit provides support for Kieback & Peter GmbH IMX6Q based TPC board. U-boot console output: U-Boot SPL 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200) Trying to boot from MMC1 U-Boot 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200) CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz) CPU: Extended Commercial temperature grade (-20C to 105C) at 37C Reset cause: POR Board: K+P KP_IMX6Q_TPC i.MX6Q Watchdog enabled I2C: ready DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: FEC [PRIME] Autoboot in 3 seconds
-
- Feb 22, 2018
-
-
Jagan Teki authored
Currently SPL_LOAD_FIT is unable to boot from nand on i.MX6QDL platform, so enable only for MMC boards. Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com>
-
- Jan 12, 2018
-
-
Christopher Spinrath authored
Like many other i.MX6 based boards, there are multiple variants of the cm-fx6 module featuring different SoC variants. Furthermore, the module can be paired with multiple baseboards. At the same time modern distribution like Fedora require U-Boot to select a proper devicetree which depends on the SoC variant and the baseboard. Thus, export the SoC variant and the actual board to the environment following the conventions of other i.MX6 devices (e.g. the NXP boards) such that the environment can select a devicetree file to load. For now, we only know for sure that the cm-fx6 module and the SB-fx6m baseboard amount to a Utilite Computer variant (depending on the SoC). Further combinations may be added in the future; e.g. CompuLab's evaluation board once someone can verify the identification string stored in its eeprom. Signed-off-by:
Christopher Spinrath <christopher.spinrath@rwth-aachen.de> Reviewed-by:
Stefano Babic <sbabic@denx.de>
-
Stefano Babic authored
Board has 1GB RAM and boots from SD Card U-Boot SPL 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54) BT_FUSE_SEL already fused, will do nothing Trying to boot from MMC1 U-Boot 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54 +0100) CPU: Freescale i.MX6DL rev1.2 996 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 40C Reset cause: POR I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC [PRIME] Signed-off-by:
Stefano Babic <sbabic@denx.de> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
- Jan 08, 2018
-
-
Stefan Agner authored
The i.MX 6UL/ULL feature a Cortex-A7 CPU which suppor the ARM generic timer. This change makes use of the ARM generic timer in U-Boot. This is crucial to make the ARM generic timers usable in Linux since timer_init() initalizes the system counter module, which is necessary to use the generic timers CP15 registers. Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
Stefan Agner authored
Introduce a new config symbol to select the i.MX General Purpose Timer (GPT). Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
- Jan 04, 2018
-
-
Fabio Estevam authored
Since commit 051ba9e0 ("Kconfig: mx6ull: Deselect MX6UL from CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so take this into consideration in all the checks for CONFIG_MX6UL. This fixes a boot regression. Reported-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by:
Stefan Agner <stefan@agner.ch> Tested-by:
Breno Lima <breno.lima@nxp.com> Tested-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Stefano Babic <sbabic@denx.de> Tested-by:
Jörg Krause <joerg.krause@embedded.rocks>
-
- Jan 03, 2018
-
-
Eric Nelson authored
This is a virtual "board" that uses configuration files and Kconfig to define the memory layout used by a real board during the board bring-up process. It generates an SPL image that can be loaded using imx_usb or SB_LOADER.exe. When run, it will generate a set of calibration constants for use in either or both a DCD configuration file for boards that use u-boot.imx or struct mx6_mmdc_calibration for boards that boot via SPL. In essence, it is a configurable, open-source variant of the Freescale ddr-stress tool. https://community.nxp.com/docs/DOC-105652 File mx6memcal_defconfig configures the board for use with mx6sabresd or mx6qsabreauto. Signed-off-by:
Eric Nelson <eric@nelint.com> Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
- Dec 29, 2017
-
-
Breno Lima authored
Currently CONFIG_SECURE_BOOT is selecting FSL_CAAM for all i.MX devices, this causes the following error when building mx6sl boards since this SoC doesn't have the CAAM block: In file included from drivers/crypto/fsl/jobdesc.c:12:0: drivers/crypto/fsl/jobdesc.c: In function 'inline_cnstr_jobdesc_blob_dek': include/fsl_sec.h:268:25: error: 'CAAM_ARB_BASE_ADDR' undeclared (first use in this function) #define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000) ^ drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro 'SEC_MEM_PAGE1' memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz); ^ include/fsl_sec.h:268:25: note: each undeclared identifier is reported only once for each function it appears in #define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000) ^ drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro 'SEC_MEM_PAGE1' memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz); ^ scripts/Makefile.build:280: recipe for target 'drivers/crypto/fsl/jobdesc.o' failed make[3]: *** [drivers/crypto/fsl/jobdesc.o] Error 1 scripts/Makefile.build:425: recipe for target 'drivers/crypto/fsl' failed make[2]: *** [drivers/crypto/fsl] Error 2 scripts/Makefile.build:425: recipe for target 'drivers/crypto' failed make[1]: *** [drivers/crypto] Error 2 Add HAS_CAAM configuration to avoid this error. Signed-off-by:
Breno Lima <breno.lima@nxp.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
Breno Lima authored
MX6UL contains features that MX6ULL doesn't support. Deselect CONFIG_MX6UL and select SYS_L2CACHE_OFF and ROM_UNIFIED_SECTIONS. The motivation for doing this change is that MX6UL supports CAAM and MX6ULL does not. Signed-off-by:
Breno Lima <breno.lima@nxp.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
Breno Lima authored
Currently the MX6SL option is selected via CONFIG_SYS_EXTRA_OPTIONS, but it is better to select it directly via Kconfig. Signed-off-by:
Breno Lima <breno.lima@nxp.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
-
Fabio Estevam authored
Currently only imx6sx-sdb.dtb is loaded, but if revA board is used the correct dtb is imx6sx-sdb-reva.dtb, so make this possible. While at it, remove an extra 'mmc dev'. Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
- Nov 27, 2017
-
-
Jagan Teki authored
Add new board names for existing board support imx6q - icore and icore_rqs boards imx6ul - geam6ul and isiot boards Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com>
-
Jagan Teki authored
Add OF_CONTROL support for SPL code. Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com>
-
Jagan Teki authored
Add OF_CONTROL support for SPL code. Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com>
-
- Nov 20, 2017
-
-
Fabio Estevam authored
Currently the MX6QDL option is selected via CONFIG_SYS_EXTRA_OPTIONS, but it is better to select it directly via Kconfig. Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com>
-
- Nov 09, 2017
-
-
Lukasz Majewski authored
This commit provides support for LWN's IMX6Q based DISPLAY5 board. Signed-off-by:
Lukasz Majewski <lukma@denx.de>
-
- Oct 12, 2017
-
-
Marek Vasut authored
Add support for the DHCOM i.MX6 PDK board. This board has: - FEC ethernet - EHCI USB host - 3x SDMMC Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
-
- Sep 08, 2017
-
-
Chris Packham authored
This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig. Update defconfigs. Signed-off-by:
Chris Packham <judge.packham@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
-
Chris Packham authored
CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and LAN78XX options under new menu. Finally update the defconfigs that need CONFIG_USB_HOST_ETHER. Signed-off-by:
Chris Packham <judge.packham@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
-
- Aug 16, 2017
-
-
Peng Fan authored
Select ARM_ERRATA_845369 for i.MX6DQ/DL/QP. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Stefano Babic <sbabic@denx.de>
-
Peng Fan authored
The ARM errata 751472, 794072, 761320 only applied to the following configuration: This erratum affects configurations with either: - One processor if the ACP is present - Two or more processors i.MX6 family does not have the ACP and thus only the MPCore system will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
-