a: initial addition, Boundary Devices board

a: add usb hub reset/uart3/uart4/flexcan pins
a: keep USB Huawei Modem in reset
a: add leds rx active/tx active
a: remove printf of board_mmc_init
a.h: add cmd_custom to avoid update u-boot warning
a: add CONFIG_CMD_GPIO
a: remove redundant CONFIG_CMD_GPIO
a: verify port in board_ehci_hcd_init
a: use boundary.h
a: call preboot_keys
a: add CONFIG_SPI_FLASH_SPANSION
a: add RV4162 rtc on I2C2
a: a_defconfig add CONFIG_BLOCK_CACHE
a: use common code for eth init
a: eth.c now in common directory
a: move misc_init_r/do_kbd to common
a: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common
a: add  CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs
a: add a_s512m.cfg
a: port to v2018.07

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

a: update to v2017.01
a: update to v2017.03
a.h: add custom BOOT_TARGET_DEVICES priority

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>

arch/arm/mach-imx/mx6/Kconfig

@@ -356,6 +356,9 @@ config TARGET_MX6ULL_14X14_EVK
 	select DM
 	select DM_THERMAL
 
+config TARGET_A
+	bool "a"
+
 config TARGET_NITROGEN6X
 	bool "nitrogen6x"
 	imply USB_HOST_ETHER
@@ -493,6 +496,7 @@ source "board/armadeus/opos6uldev/Kconfig"
 source "board/bachmann/ot1200/Kconfig"
 source "board/barco/platinum/Kconfig"
 source "board/barco/titanium/Kconfig"
+source "board/boundary/a/Kconfig"
 source "board/boundary/nitrogen6x/Kconfig"
 source "board/bticino/mamoj/Kconfig"
 source "board/ccv/xpress/Kconfig"

board/boundary/a/6x_bootscript-upgrade-usbotg.txt

+for n in 51 52 53 54 ; do gpio clear $n ; done
+load usb 0 10008000 /restore-to-emmc-amp.img.gz
+	&& time gzwrite mmc 0 10008000 0x$filesize 400000 0
+	&& gpio set 51 
+	&& gpio set 52 
+	&& while itest.l 0 -eq 0 ; do ;; done
+gpio set 54
+

board/boundary/a/6x_bootscript-writeable-rootfs.txt

+setenv bootargs enable_wait_mode=off
+setenv bootargs $bootargs console=ttymxc1,115200
+
+if test -n "$tempfuse" ; then
+	setenv bootargs $bootargs thermal.fusedata=$tempfuse
+fi
+
+if itest.s "x" != "x$asix"; then
+    setenv bootargs $bootargs asix.ethaddr1=$asix;
+fi
+
+if kbd ; then
+    if itest.s "xF" == "x$keybd" ; then
+        ums 0 mmc 0;
+    fi
+fi
+
+if ${fs}load ${dtype} 0:1 10800000 /uImage ; then
+    setenv bootargs $bootargs rootwait root=/dev/mmcblk0p2 init=/sbin/init
+    bootm 10800000
+fi

board/boundary/a/6x_bootscript.txt

+setenv bootargs enable_wait_mode=off
+if test -n "$tempfuse" ; then
+	setenv bootargs $bootargs thermal.fusedata=$tempfuse
+fi
+
+kernel=/boot/uImage
+ramdisk=/boot/uramdisk.img
+
+if kbd ; then
+    if itest.s "xF" == "x$keybd" ; then
+        kernel=/boot/uImage-usbwrite
+        ramdisk=/boot/uramdisk-usbwrite
+    fi
+fi
+
+if itest.s "x" != "x$asix"; then
+    setenv bootargs $bootargs asix.ethaddr1=$asix;
+fi
+
+setenv bootargs $bootargs console=ttymxc1,115200
+if ${fs}load ${dtype} 0:1 10800000 $kernel ; then
+    if ${fs}load ${dtype} 0:1 12800000 $ramdisk ; then
+        bootm 10800000 12800000
+    else
+        echo "Error loading RAM disk $ramdisk"
+    fi
+else
+    echo "Error loading kernel image $kernel"
+fi

board/boundary/a/Kconfig

+if TARGET_A
+
+config SYS_CPU
+	default "armv7"
+
+config SYS_BOARD
+	default "a"
+
+config SYS_VENDOR
+	default "boundary"
+
+config SYS_SOC
+	default "mx6"
+
+config SYS_CONFIG_NAME
+	default "a"
+
+source "board/boundary/common/Kconfig"
+
+endif

board/boundary/a/MAINTAINERS

+A BOARD
+M:	Troy Kisky <troy.kisky@boundarydevices.com>
+S:	Maintained
+F:	board/boundary/a/
+F:	include/configs/a.h
+F:	configs/a_defconfig
+

board/boundary/a/Makefile

+#
+# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
+# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
+# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y  := a.o

board/boundary/a/a.c

+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/sys_proto.h>
+#include <malloc.h>
+#include <asm/arch/mx6-pins.h>
+#include <linux/errno.h>
+#include <asm/gpio.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/mach-imx/spi.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+#include <linux/fb.h>
+#include <asm/arch/crm_regs.h>
+#include <input.h>
+#include <usb/ehci-ci.h>
+#include "../common/bd_common.h"
+#include "../common/padctrl.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define AUD_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm |			\
+	PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
+	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define SPI_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_SPEED_MED |	\
+	PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
+#define UART_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
+	PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define USDHC_PAD_CTRL	(PAD_CTL_PUS_47K_UP |			\
+	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm |			\
+	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+/*
+ *
+ */
+static iomux_v3_cfg_t const init_pads[] = {
+	/* AUDMUX - mu609 usb modem */
+	IOMUX_PAD_CTRL(CSI0_DAT7__AUD3_RXD, AUD_PAD_CTRL),
+	IOMUX_PAD_CTRL(CSI0_DAT4__AUD3_TXC, AUD_PAD_CTRL),
+	IOMUX_PAD_CTRL(CSI0_DAT5__AUD3_TXD, AUD_PAD_CTRL),
+	IOMUX_PAD_CTRL(CSI0_DAT6__AUD3_TXFS, AUD_PAD_CTRL),
+
+	/* ECSPI1 */
+	IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
+#define GP_ECSPI1_NOR_CS		IMX_GPIO_NR(3, 19)
+	IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP),
+
+	/* ENET pads that don't change for PHY reset */
+	IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, PAD_CTRL_ENET_MDIO),
+	IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, PAD_CTRL_ENET_MDC),
+	IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, PAD_CTRL_ENET_TX),
+	/* pin 42 PHY nRST */
+#define GP_RGMII_PHY_RESET	IMX_GPIO_NR(1, 27)
+	IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, WEAK_PULLUP),
+#define GPIRQ_ENET_PHY		IMX_GPIO_NR(1, 28)
+	IOMUX_PAD_CTRL(ENET_TX_EN__GPIO1_IO28, WEAK_PULLUP),
+
+	/* FLEXCAN */
+	IOMUX_PAD_CTRL(KEY_COL2__FLEXCAN1_TX, WEAK_PULLUP),
+	IOMUX_PAD_CTRL(KEY_ROW2__FLEXCAN1_RX, WEAK_PULLUP),
+#define GP_FLEXCAN_STANDBY	IMX_GPIO_NR(1, 2)
+	IOMUX_PAD_CTRL(GPIO_2__GPIO1_IO02, WEAK_PULLUP),
+
+	/* gpio_keys */
+#define GP_S0_FACTORY_RESET	IMX_GPIO_NR(4, 6)
+	IOMUX_PAD_CTRL(KEY_COL0__GPIO4_IO06, WEAK_PULLUP),	/* S0: factory reset */
+#define GP_J57_INPUT	IMX_GPIO_NR(6, 6)
+	IOMUX_PAD_CTRL(EIM_A23__GPIO6_IO06, WEAK_PULLUP),	/* J57: pin3 input switch */
+#define GP_S1_LOOPBACK	IMX_GPIO_NR(4, 5)
+	IOMUX_PAD_CTRL(GPIO_19__GPIO4_IO05, WEAK_PULLUP),	/* S1:1 - Loopback request switch */
+#define GP_S1_DIAG1	IMX_GPIO_NR(4, 7)
+	IOMUX_PAD_CTRL(KEY_ROW0__GPIO4_IO07, WEAK_PULLUP),	/* S1:2 - Diagnostic Switch 1 */
+#define GP_S1_DIAG2	IMX_GPIO_NR(4, 8)
+	IOMUX_PAD_CTRL(KEY_COL1__GPIO4_IO08, WEAK_PULLUP),	/* S1:3 - Diagnostic Switch 2 */
+#define GP_S1_INPUT	IMX_GPIO_NR(2, 27)
+	IOMUX_PAD_CTRL(EIM_LBA__GPIO2_IO27, WEAK_PULLUP),	/* S1:4 */
+
+	/* i2c1 rtc rv4162 */
+#define GPIRQ_RTC_RV4162	IMX_GPIO_NR(4, 15)
+	IOMUX_PAD_CTRL(KEY_ROW4__GPIO4_IO15, WEAK_PULLUP),
+
+	/* led outputs*/
+	/*
+	 * From antenna connector toward USB OTG
+	 * connector, there are four LEDS in the
+	 * order listed below.
+	 */
+#define GP_LED0		IMX_GPIO_NR(2, 19)
+	IOMUX_PAD_CTRL(EIM_A19__GPIO2_IO19, WEAK_PULLDN),	/* Led 4 */
+#define GP_LED1		IMX_GPIO_NR(2, 20)
+	IOMUX_PAD_CTRL(EIM_A18__GPIO2_IO20, WEAK_PULLDN),	/* Led 3 */
+#define GP_LEDRED	IMX_GPIO_NR(2, 22)
+	IOMUX_PAD_CTRL(EIM_A16__GPIO2_IO22, WEAK_PULLDN),	/* Led 1 */
+#define GP_LED2		IMX_GPIO_NR(2, 21)
+	IOMUX_PAD_CTRL(EIM_A17__GPIO2_IO21, WEAK_PULLDN),	/* Led 2 */
+#define GP_RXACT	IMX_GPIO_NR(1, 3)
+	IOMUX_PAD_CTRL(GPIO_3__GPIO1_IO03, WEAK_PULLUP),	/* RX_ACT led */
+#define GP_TXACT	IMX_GPIO_NR(1, 4)
+	IOMUX_PAD_CTRL(GPIO_4__GPIO1_IO04, WEAK_PULLUP),	/* TX_ACT led */
+
+	/* reg_usbotg_vbus */
+#define GP_REG_USBOTG	IMX_GPIO_NR(3, 22)
+	IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN),
+
+	/* UART1 */
+	IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL),
+
+	/* UART2 */
+	IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL),
+
+	/* UART3 */
+	IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL),
+	/* RS485 RX Enable */
+#define GP_UART3_RX_EN	IMX_GPIO_NR(2, 16)
+	IOMUX_PAD_CTRL(EIM_A22__GPIO2_IO16, WEAK_PULLDN),
+	/* RS485 TX Enable */
+#define GP_UART3_TX_EN	IMX_GPIO_NR(2, 17)
+	IOMUX_PAD_CTRL(EIM_A21__GPIO2_IO17, WEAK_PULLDN),
+	/* RS485/RS232 Select 2.5V */
+#define GP_UART3_RS485_EN	IMX_GPIO_NR(2, 18)
+	IOMUX_PAD_CTRL(EIM_A20__GPIO2_IO18, WEAK_PULLDN),
+	/* ON - meaning depends on others */
+#define GP_UART3_AON		IMX_GPIO_NR(7, 13)
+	IOMUX_PAD_CTRL(GPIO_18__GPIO7_IO13, WEAK_PULLDN),
+
+	/* UART4 - mu609 */
+	IOMUX_PAD_CTRL(CSI0_DAT12__UART4_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(CSI0_DAT13__UART4_RX_DATA, UART_PAD_CTRL),
+
+	/* USBH1 */
+#define GP_USBH1_HUB_RESET	IMX_GPIO_NR(7, 12)
+	IOMUX_PAD_CTRL(GPIO_17__GPIO7_IO12, WEAK_PULLDN),
+#define GP_AX88772A_RESET	IMX_GPIO_NR(2, 25)
+	IOMUX_PAD_CTRL(EIM_OE__GPIO2_IO25, WEAK_PULLDN),
+
+	/* USBH1 - mu609*/
+#define GP_MODEM_RESET	IMX_GPIO_NR(2, 6)
+	IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP), 	/* Modem nRESET */
+#define GP_MODEM_OFF	IMX_GPIO_NR(2, 5)
+	IOMUX_PAD_CTRL(NANDF_D5__GPIO2_IO05, OUTPUT_40OHM),   	/* Modem OFF */
+	IOMUX_PAD_CTRL(NANDF_D7__GPIO2_IO07, WEAK_PULLUP), 	/* Modem Sleep stat */
+	IOMUX_PAD_CTRL(NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM),	/* Modem Wakeup Out */
+	IOMUX_PAD_CTRL(NANDF_RB0__GPIO6_IO10, WEAK_PULLUP), 	/* Modem Wakeup In */
+
+	/* USBOTG */
+	IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, USDHC_PAD_CTRL),	/* USBOTG ID pin */
+	IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP),	/* USBOTG OC pin */
+
+	/* USDHC4 */
+	IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL),
+#define GP_EMMC_RESET		IMX_GPIO_NR(2, 0)
+	IOMUX_PAD_CTRL(NANDF_D0__GPIO2_IO00, WEAK_PULLUP), /* RESET (rev 1) */
+};
+
+static const struct i2c_pads_info i2c_pads[] = {
+	/* I2C2 RV4162 RTC */
+	I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL),
+};
+#define I2C_BUS_CNT	1
+
+
+#ifdef CONFIG_USB_EHCI_MX6
+int board_ehci_hcd_init(int port)
+{
+	if (port) {
+		/* Reset USB hub */
+		gpio_direction_output(GP_USBH1_HUB_RESET, 0);
+		mdelay(2);
+		gpio_set_value(GP_USBH1_HUB_RESET, 1);
+	}
+	return 0;
+}
+
+int board_ehci_power(int port, int on)
+{
+	if (port)
+		return 0;
+	gpio_set_value(GP_REG_USBOTG, on);
+	return 0;
+}
+
+#endif
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg board_usdhc_cfg[] = {
+	{.esdhc_base = USDHC4_BASE_ADDR, .bus_width = 8, .gp_reset = GP_EMMC_RESET},
+};
+#endif
+
+#ifdef CONFIG_MXC_SPI
+int board_spi_cs_gpio(unsigned bus, unsigned cs)
+{
+	return (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1;
+}
+#endif
+
+static const unsigned short gpios_out_low[] = {
+	GP_RGMII_PHY_RESET,
+	GP_LED0,
+	GP_LED1,
+	GP_LEDRED,
+	GP_LED2,
+	GP_REG_USBOTG, 			/* disable USB otg power */
+	GP_MODEM_RESET,			/* assert MODEM nRESET */
+	GP_EMMC_RESET,			/* assert eMMC reset*/
+	GP_UART3_RX_EN,
+	GP_UART3_TX_EN,
+	GP_UART3_RS485_EN,
+	GP_UART3_AON,
+	GP_USBH1_HUB_RESET,
+	GP_AX88772A_RESET,		/* disable USB ethernet */
+};
+
+static const unsigned short gpios_out_high[] = {
+	GP_ECSPI1_NOR_CS,		/* SS1 of spi nor */
+	GP_FLEXCAN_STANDBY,
+	GP_RXACT,
+	GP_TXACT,
+	GP_MODEM_OFF,			/* assert MODEM off */
+};
+
+static const unsigned short gpios_in[] = {
+	GPIRQ_ENET_PHY,
+	GP_S0_FACTORY_RESET,		/* S0: factory reset */
+	GP_J57_INPUT,			/* J57: pin3 input switch */
+	GP_S1_LOOPBACK,			/* S1:1 - Loopback request switch */
+	GP_S1_DIAG1,			/* S1:2 - Diagnostic Switch 1 */
+	GP_S1_DIAG2,			/* S1:3 - Diagnostic Switch 2 */
+	GP_S1_INPUT,			/* S1:4 */
+	GPIRQ_RTC_RV4162,
+};
+
+int board_early_init_f(void)
+{
+	set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in));
+	set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1);
+	set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0);
+	SETUP_IOMUX_PADS(init_pads);
+	return 0;
+}
+
+int board_init(void)
+{
+	common_board_init(i2c_pads, I2C_BUS_CNT, IOMUXC_GPR1_OTG_ID_GPIO1,
+			NULL, 0, 0);
+	return 0;
+}
+
+const struct button_key board_buttons[] = {
+	{"factory",	GP_S0_FACTORY_RESET,	'F', 1},
+	{"input",	GP_J57_INPUT,	'I', 1},
+#if 0
+	{"D1",	GP_S1_LOOPBACK,	'1', 0},	/* S1:1 - Loopback request switch */
+	{"D2",	GP_S1_DIAG1,	'2', 0},	/* S1:2 - Diagnostic Switch 1 */
+	{"D3",	GP_S1_DIAG2,	'3', 0},	/* S1:3 - Diagnostic Switch 2 */
+	{"D4",	GP_S1_INPUT,	'4', 0},	/* S1:4 */
+#endif
+	{NULL, 0, 0, 0},
+};
+
+#ifdef CONFIG_CMD_BMODE
+const struct boot_mode board_boot_modes[] = {
+	/* 4 bit bus width */
+	{"mmc0",	MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, /* usdhc4 */
+	{NULL,		0},
+};
+#endif
+
+#define PROGRESS_BITS 3
+
+static int const leds[] = {
+	GP_LED0,
+	GP_LED1,
+	GP_LEDRED,
+	GP_LED2
+};
+
+void gzwrite_progress_init(u64 expected_size)
+{
+	int i;
+	putc('\n');
+	for (i = 0; i < ARRAY_SIZE(leds); i++)
+		gpio_direction_output(leds[i], 0);
+}
+
+void gzwrite_progress(int iteration,
+		     u64 bytes_written,
+		     u64 total_bytes)
+{
+	int i;
+	if (0 == (iteration & 3))
+		printf("%llu/%llu\r", bytes_written, total_bytes);
+
+	for (i = 0; i < 2; i++)
+		gpio_set_value(leds[i], (iteration & 1) == i);
+}
+
+void gzwrite_progress_finish(int returnval, /* 0 == success */
+			    u64 totalwritten,
+                            u64 totalsize,
+                            u32 expected_crc,
+                            u32 calculated_crc)
+{
+	int i;
+	for (i = 0; i < ARRAY_SIZE(leds); i++)
+		gpio_set_value(leds[i], 0);
+
+	if (0 == returnval) {
+		printf("\n\t%llu bytes, crc 0x%08x\n",
+		       totalwritten, calculated_crc);
+		gpio_set_value(leds[3], 1);
+	} else {
+		printf("\n\tuncompressed %llu of %llu\n"
+		       "\tcrcs == 0x%08x/0x%08x\n",
+		       totalwritten, totalsize,
+		       expected_crc, calculated_crc);
+		gpio_set_value(leds[2], 1);
+	}
+}

board/boundary/a/a_s512m.cfg

+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM      spi
+
+#define __ASSEMBLY__
+#include <config.h>
+#ifdef CONFIG_SECURE_BOOT
+CSF CONFIG_CSF_SIZE
+#endif
+#include "asm/arch/mx6-ddr.h"
+#include "asm/arch/iomux.h"
+#include "asm/arch/crm_regs.h"
+
+/* NC YET */
+#define MX6_MMDC_P0_MPDGCTRL0_VAL	0x42350231
+#define MX6_MMDC_P0_MPDGCTRL1_VAL	0x021A0218
+#define MX6_MMDC_P0_MPRDDLCTL_VAL	0x4B4B4E49
+#define MX6_MMDC_P0_MPWRDLCTL_VAL	0x3F3F3035
+#define MX6_MMDC_P0_MPWLDECTRL0_VAL	0x0040003C
+#define MX6_MMDC_P0_MPWLDECTRL1_VAL	0x0032003E
+#define WALAT	1
+
+#include "../common/mx6/ddr-setup.cfg"
+#define RANK 0
+#define BUS_WIDTH 32
+/* MT41K128M16JT-125 IT:K */
+#include "../common/mx6/800mhz_128mx16.cfg"
+#include "../common/mx6/clocks.cfg"

configs/a_defconfig

+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TARGET_A=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/a/a_s512m.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"a\""
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_FASTBOOT_BUF_SIZE=0x26000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_SPI=y
+CONFIG_MXC_SPI=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_OF_LIBFDT=y

include/configs/a.h

+/*
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the Boundary Devices A board
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "mx6_common.h"
+
+#define CONFIG_MACH_TYPE	0xffffffff
+
+#define CONFIG_CONSOLE_MUX
+
+#define CONFIG_SYS_FSL_USDHC_NUM	1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#define BD_I2C_MASK	2
+#define BOOT_TARGET_DEVICES(func) \
+	DISTRO_BOOT_DEV_USB(func) \
+	DISTRO_BOOT_DEV_MMC(func)
+#define BD_USB_START 	"setexpr otgstat *0x020c9030 \\\\& 0x08000000;" \
+				"if itest.l ${otgstat} -eq 0 ; then " \
+					"usb start;" \
+				"fi ;"
+
+#include "boundary.h"
+#define CONFIG_EXTRA_ENV_SETTINGS BD_BOUNDARY_ENV_SETTINGS \
+	"cmd_custom= \0" \
+	"disable_giga=1\0" \
+
+#endif	       /* __CONFIG_H */