- Jun 12, 2016
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Simon Glass authored
Add this file from Linux v4.5. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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Simon Glass authored
Add driver-model support to this driver. The old code remains for now so that we can convert boards one at a time. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by:
Heiko Schocher <hs@denx.de> Acked-by:
Joe Hershberger <joe.hershberger@ni.com> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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Simon Glass authored
The end address of the cache flush must be cache-line-aligned since otherwise (at least on ARM926-EJS) the request is ignored. When the cache is enabled this means that packets are not sent. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de> Acked-by:
Joe Hershberger <joe.hershberger@ni.com> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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Simon Glass authored
Adjust this driver to avoid using struct netdev in functions that driver model will call. Also refactor the receive function to be compatible with driver model. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com> Acked-by:
Joe Hershberger <joe.hershberger@ni.com> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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Andre Renaud authored
Avoid generating this section if there is nothing in it. Signed-off-by:
Andre Renaud <andre@designa-electronics.com> Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Joe Hershberger <joe.hershberger@ni.com>
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Simon Glass authored
Flushing part of the cache should be done on cache boundaries. Trying to flush part of a cache line is not supported and the request may be ignored or print warnings. Adjust the bootm code to align the end address to prevent this problem. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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Simon Glass authored
At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling lowlevel_init(). This means that the instruction cache is not enabled and the board runs very slowly. What is really needed in many cases is to skip the call to lowlevel_init() but still perform CP15 init. Add an option to handle this. Reviewed-by:
Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com> Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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Andre Renaud authored
This is available on AT91SAM9G45. Add the peripheral address and flag definitions. Signed-off-by:
Andre Renaud <andre@designa-electronics.com> Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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Marek Vasut authored
On systems with PIO3 (SAMA5D3/D4/..), the pullup and pulldown configuration is mutualy exclusive. This patch assures that the opposite pull resistor gets disabled before the requested pull resistor is enabled. This changes behavior of at91_set_pio_pulldown() such that the pullup is only disabled if pulldown is to be enabled. This changes behavior of at91_set_pio_pullup() such that the pulldown is only disabled if pullup is to be enabled. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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- Jun 09, 2016
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Heiko Schocher authored
In the draco CPU board family, etamin is a new variant with bigger flash and more RAM. Due to new flash that uses larger pages (4K) some changes are necessary because it impacts the MTD partition layout and the ubi mount parameters. Signed-off-by:
Samuel Egli <samuel.egli@siemens.com> Signed-off-by:
Heiko Schocher <hs@denx.de> [trini: Move BOOTDELAY into defconfig, just always be 3 now] Signed-off-by:
Tom Rini <trini@konsulko.com>
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Heiko Schocher authored
writting to ubi nand partitions need after write ends an erase of the remaining sectors. This fail, if dfu write size was not a multiple of erasesize, example log: Failure erase: -1 Fix this error. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
read the ECC Type field from the i2c eeprom, instead configuring it static in the U-Boot binary. see RM: Table 26-17. NAND Geometry Information on I2C EEPROM Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
support in omap_nand_switch_ecc() also an eccstrength from 16. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
add for nand devices mtd concat support. Generic MTD concat support is already ported to mainline, and used in the cfi_mtd driver. This patch adds it similiar for nand devices. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
simple detachs ubi from the mtd partition. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Samuel Egli authored
From: Samuel Egli <samuel.egli@siemens.com> Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
U-Boot SPL 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:40:06) SHC C3-Sample MPU reference clock runs at 6 MHz Setting MPU clock to 594 MHz Enabling Spread Spectrum of 18 permille for MPU Trying to boot from MMC reading u-boot.img reading u-boot.img U-Boot 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:05:35 +0100) Watchdog enabled I2C: ready DRAM: 512 MiB reloc off 1f783000 MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Net: cpsw U-Boot# Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
on the shc board we see when booting in net boot mode, that the ROM bootloader sends "AM335x ROM" as vendor-class-identifier. U-Boots doc says "DM814x ROM". So, add the info to the doc, that there is also "AM335x ROM" possible. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Heiko Schocher authored
make this function weak, so board code can setup in SPL MMC init with board special values. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
Enable 8bit interface on HSMMC2 for am33xx to support 8bit eMMC chips. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Heiko Schocher authored
revert patch: commit: 6b2221b0: mmc: Handle switch error status bit in MMC card status to get eMMC working on shc board Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
show_boot_progress() is now called from SPL also. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
Enable Spread Spectrum for the MPU by calculating the required values and setting the registers accordingly. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Heiko Schocher authored
add missing CM_CLKMODE_DPLL_SSC_ACK_MASK, CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK and CM_CLKMODE_DPLL_SSC_TYPE_MASK defines. Used for enabling spread spectrum. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Heiko Schocher authored
add missing: OMAP_GPIO_IRQSTATUS_SET_0 and OMAP_GPIO_IRQSTATUS_SET_1 registers. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Heiko Schocher authored
add the following defines, needed for the upcoming shc board support: Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Heiko Schocher authored
if CONFIG_VERSION_VARIABLE is set, the U-Boot environment contains a "vers" variable with the current U-Boot version string. If now "printenv" is called, test/py fails as it detects the main_sign string, which is in this case correct. So check only the main_sign as an error, if CONFIG_VERSION_VARIABLE is not set. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Heiko Schocher authored
move CONFIG_BOOTDELAY into a Kconfig option. Used for this purpose the moveconfig.py tool in tools. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Acked-by:
Igor Grinberg <grinberg@compulab.co.il>
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Simon Glass authored
This current code passes the variable arguments list to sprintf(). This is not correct. Fix it by calling _vprintf() directly. This makes firefly-rk3288 boot again. Fixes: abeb272d ("tiny-printf: Support snprintf()") Reviewed-by:
Stefan Roese <sr@denx.de> Acked-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Simon Glass <sjg@chromium.org>
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- Jun 08, 2016
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Masahiro Yamada authored
I noticed secondary CPUs sometimes fail to wake up, and the root cause is that the sev instruction wakes up slave CPUs before the preceding the register write is observed by them. The read-back of the accessed register does not guarantee the order. In order to ensure the order between the register write and the sev instruction, a dsb instruction should be executed prior to the sev. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Unlike NAND, eMMC can be re-written without erasing. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
This code auto-detects the best-match FDT file name, but it should respect the user's choice if "fdt_file" environment is found in a saved set of environments. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Because setenv() may fail, it is better to check its return code. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
This function is shared between PH1-LD11 and PH1-LD20. The difference is the boot-mode latch for the USB boot mode. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The Boot ROM on PH1-LD11/LD20 exports built-in APIs to load images from an eMMC device. They are useful to reduce the memory footprint of SPL, rather than compiling the whole MMC framework. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Jun 06, 2016
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com>
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http://git.denx.de/u-boot-samsungTom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com> Conflicts: configs/peach-pi_defconfig configs/peach-pit_defconfig
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B, Ravi authored
Avoid use of hard coded mmcdev value, use bootpart instead, so finduuid works based on bootpart set for a specific platform. Signed-off-by:
Ravi Babu <ravibabu@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Andre Przywara authored
Some SPL loaders (like Allwinner's boot0, and Broadcom's boot0) require a header before the actual U-Boot binary to both check its validity and to find other data to load. Sometimes this header may only be a few bytes of information, and sometimes this might simply be space that needs to be reserved for a post-processing tool. Introduce a config option to allow assembler preprocessor commands to be inserted into the code at the appropriate location; typical assembler preprocessor commands might be: .space 1000 .word 0x12345678 Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Signed-off-by:
Steve Rae <srae@broadcom.com> Commit Notes: Please note that the current code: start.S (arm64) and vectors.S (arm) already jumps over some portion of data already, so this option basically just increases the size of this region (and the resulting binary). For use with Allwinner's boot0 blob there is a tool called boot0img[1], which fills the header to allow booting A64 based boards. For the Pine64 we need a 1536 byte header (including the branch instruction) at the moment, so we add this to the defconfig. [1] https://github.com/apritzel/pine64/tree/master/tools END Reviewed-by:
Tom Rini <trini@konsulko.com>
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Chris Packham authored
When setting up a DDR controller it is useful to be able to display frequencies in a readable form. Make the strmhz() function available in SPL builds provided there is full vsprintf available. Reviewed-by:
Tony O'Brien <tony.obrien@alliedtelesis.co.nz> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Chris Packham <judge.packham@gmail.com>
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