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Commit b4d956f6 authored by Simon Glass's avatar Simon Glass Committed by Andreas Bießmann
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bootm: Align cache flush end address correctly


Flushing part of the cache should be done on cache boundaries. Trying to
flush part of a cache line is not supported and the request may be ignored
or print warnings.

Adjust the bootm code to align the end address to prevent this problem.

Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
Reviewed-by: default avatarHeiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: default avatarHeiko Schocher <hs@denx.de>
Reviewed-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
Reviewed-by: default avatarAndreas Bießmann <andreas@biessmann.org>
parent b5bd0982
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...@@ -445,7 +445,7 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end, ...@@ -445,7 +445,7 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE); bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE);
return err; return err;
} }
flush_cache(load, *load_end - load); flush_cache(load, ALIGN(*load_end - load, ARCH_DMA_MINALIGN));
debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end); debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end);
bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED); bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);
......
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