These two functions are only used in lib/tiny-printf.c .

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Stefan Roese <sr@denx.de>

Leave only detected flash type enabled in FTD as otherwise GPMC CS is
claimed (and never freed) by Linux, causing 'concurent' flash type
not to be probed.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>

ISEE's U-Boot and Linux are using 1bit ECC scheme, while we
switched to 8bit ECC to fullfill flash specification requirements.
However when trying to run U-Boot on board with 1bit ECC'd data
on flash, UBI code takes several minutes to pass scan as reading
of every block ends with ecc error (which is also printed on
console).
So, until proper solution is developed, disable environment
alltogether.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
    with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.

This is needed for example when including sdhci.h, which include
asm/gpio.h>.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add ARM global timer based timer

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

The SysTick is a 24-bit down counter that is found on all ARM Cortex
M3, M4, M7 devices and is always located at a fixed address.

The number of reference clock ticks that correspond to 10ms is normally
defined in the SysTick Calibration register's TENMS field. However, on some
devices this is wrong, so this driver allows the clock rate to be defined
using CONFIG_SYS_HZ_CLOCK.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>

The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage generates a gp header
only with size of the image as size field. Fix it

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

The workaround for ARM errata 725233 had been lost since
commit 45bf0585 (armv7: adapt omap3 to the new cache
maintenance framework). Bring it back in order to avoid
very difficult to reproduce, but actually encountered in
the wild CPU deadlocks when running software rendered
X11 desktop on OMAP3530 hardware.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Migrate to Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>

Boards with OMAP3530 SoC fail to boot since commit bd2c4522
("ti: armv7: enable EXT support in SPL (using ti_armv7_common.h)")
because it enabled the use of Thumb2 for the SPL.

Experiments have shown that the deadlock happens in the
prcm_init() function from 'arch/arm/mach-omap2/omap3/clock.c'.

This patch enforces the compilation of clock.c source file in
ARM mode and makes the deadlock disappear. We are yet to figure
out the root cause of the problem. Still this is somewhat
better than having non-bootable boards for years.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Borrowing from omap3_logic, switch to SPL_SYS_MALLOC_SIMPLE and moving
the stack to DDR as soon as we're able.

Signed-off-by: Tom Rini <trini@konsulko.com>

For better maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Fix warnings reported when built with W=1, by DTC 1.4.2 or later:
  Node /memory has a reg or ranges property, but no unit name

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Linux Commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi
as deprecated") declared that skeleton.dtsi was deprecated.

Move the memory node below to suppress warnings of FDTGREP.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Commit 04cd4e72 ("ARM: uniphier: remove DRAM base address from
board parameters") accidentally unset the DRAM_SPARSE flag, and
changed the physical map of the DRAM channels.  Revive the original
behavior.

Fixes: 04cd4e72 ("ARM: uniphier: remove DRAM base address from board parameters")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Shunji Sato <sato.shunji@socionext.com>

Signed-off-by: Tom Rini <trini@konsulko.com>

Signed-off-by: Tom Rini <trini@konsulko.com>

Signed-off-by: Tom Rini <trini@konsulko.com>

Some initialization was unintentionally being skipped on omap5.

Fixes: f5af0827 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX")
Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

This tool does not work with Python 3. Change the shebang to make sure the
script is run by a Python 2 interpreter.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>

Currently nandecc returns zero even if underlaying
omap_nand_switch_ecc function fails. Fix that by
propagating error returned to command return value.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

This moves all of the current ARM errata from various header files and in to
Kconfig.  This allows for a minor amount of cleanup as we had some instances
where both a general common header file was enabling errata as well as the
board config.  We now just select these once at the higher level in Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

Move the default y options under arch/arm/mach-omap2/omap4/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

Move the default y options under arch/arm/mach-omap2/omap3/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

The option that we had set in board/ti/common/Kconfig as default y are
best done with imply under the appropriate main Kconfig option instead.

Signed-off-by: Tom Rini <trini@konsulko.com>

These particular SPL options are part of what the ROM provides, but for
compatibility with how we have previously used them, move them to being
implied by the board being selected.

Signed-off-by: Tom Rini <trini@konsulko.com>

Currently upstream does not yet understand the imply keyword.  For what
we use kconfiglib.py for today, this is OK.  We only need to be able to
evaluate in order to make boards.cfg and none of those choices will
depend on how imply evaluates out.

Signed-off-by: Tom Rini <trini@konsulko.com>

do_smhload was using a ulong to store the return value from
smh_load_file. That returns an int, where -1 indicates an error. As a
ulong will never be negative, smh_load_file errors were not detected and
so_smhload always returned zero.

Also, when errors were spotted, do_smhload was returning 1, rather than
the enumeration CMD_RET_FAILURE (which is also 1).

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

In some cases this is absolutely required, so select this for some secure
features.  This also requires migration of RSA_FREESCALE_EXP

Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Saksham Jain <saksham.jain@nxp.freescale.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

This define is not used in tools sources and can be removed
to avoid unnecessary link between tools and defconfig

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

DTC 1.4.2 or later checks DT unit-address without reg property and
vice-versa, and generates lots of warnings.  Fixing DT files will
take for a while.  Until then, let's turn off the check unless
building with W=*.

Introduce a new helper dtc-option to check if the option is supported
in order to suppress warnings on older versions.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

The execution flow is currently like this for aldo_num == 1 or 2:

int axp_set_aldo(int aldo_num, unsigned int mvolt)
{
...
	if (mvolt == 0)
		return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
				AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
...
	return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
 				AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
 }

I.e. aldo1 and aldo2 will always be disabled. This patch fixes it by
setting (rather than clearing) the enable bit when mvolt != 0.

Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Fixes: 795857df ("sunxi: power: add AXP809 support")