Skip to content
Snippets Groups Projects
Select Git revision
5 results
Search by author
  • Any Author
0 authors
  1. Mar 21, 2018
    • Eugeniy Paltsev's avatar
      ARC: Cache: Add support for FLUSH_N_INV D$ operations · 5d7a24d6
      Eugeniy Paltsev authored 
      
As of today __dc_line_op() and __dc_entire_op() support
only separate flush (OP_FLUSH) and invalidate (OP_INV) operations.

Add support of combined flush and invalidate (OP_FLUSH_N_INV)
operation which we planing to use in subsequent patches.

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      5d7a24d6
    • Eugeniy Paltsev's avatar
      ARC: Cache: Remove per-line I$ operations as unused · c4ef14d2
      Eugeniy Paltsev authored 
      
__cache_line_loop() function was copied from Linux kernel
where per-line instruction cache operations are really used.

In U-Boot we use only entire I$ ops, so we can drop support of
per-line I$ ops from __cache_line_loop() because __cache_line_loop()
is never called with OP_INV_IC parameter.

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      c4ef14d2
    • Eugeniy Paltsev's avatar
      ARC: Cache: Move I$ entire operation to a separate function · 16aeee81
      Eugeniy Paltsev authored 
      
Move instruction cache entire operation to a separate function
because we are planing to use it in other places like
sync_icache_dcache_all().

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      16aeee81
    • Alexey Brodkin's avatar
      arc: Fine-tune implementation of memory barriers · 71621525
      Alexey Brodkin authored 
      
We improve on 2 things:
 1. Only ARC HS family has "dmb" instructions so do compile-time
    check for automatically defined macro __ARCHS__.
    Previous check for ARCv2 ISA was not good enough because ARC EM
    family is v2 ISA as well but still "dmb" instaruction is not
    supported in EM family.

 2. Still if there's no dedicated instruction for memory barrier
    let's at least insert compile-time barrier to make sure
    compiler deosn't reorder critical memory operations.

Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      71621525
    • Alexey Brodkin's avatar
      arc: Introduce a possibility to not relocate U-boot · 264d298f
      Alexey Brodkin authored 
      
Disabling relocation might be useful on ARC for 2 reasons:
 a) For advanced debugging with Synopsys proprietary MetaWare debugger
    which is capable of accessing much more specific hardware resources
    compared to gdb. For example it may show contents of L1 and L2 caches,
    internal states of some hardware blocks etc.

    But on the downside MetaWare debugger still cannot work with PIE.
    Even though that limitation could be work-arounded with change of ELF's
    header and stripping down all debug info but with it we won't have
    debug info for source-level debugging which is quite inconvenient.

 b) Some platforms which might benefit from usage of U-Boot basically
    don't have enough RAM to accommodate relocation of U-Boot so we
    keep code in flash and use as much of RAM as possible for more
    interesting things.

Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
      264d298f
    • Alexey Brodkin's avatar
      arc: Eliminate unused code and data with GCC's garbage collector · fac47904
      Alexey Brodkin authored 
      
Finally GCC's garbage collector works on ARC so let's use it.
That's what I may see for HSDK:

Before:
   text	   data	    bss	    dec	    hex	filename
 290153	  10068	 222616	 522837	  7fa55	u-boot

After:
   text	   data	    bss	    dec	    hex	filename
 261999	   9460	 222360	 493819	  788fb	u-boot

Overall ~5% of memory footprint saved.

Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      fac47904
    • Alexey Brodkin's avatar
      arc: Don't halt slaves · 0a097ba5
      Alexey Brodkin authored 
      
This commit basically reverts two commits:
 1. cf628f77 ("arc: arcv1: Disable master/slave check")
 2. 6cba327b ("arcv2: Halt non-master cores")

With mentioned commits in-place we experience more trouble than
benefits. In case of SMP Linux kernel this is really required as
we have all the cores running from the very beginning and then we
need to allow master core to do some preparatory work while slaves
are not getting in the way.

In case of U-Boot we:
 a) Don't really run more than 1 core in parallel
 b) We may use whatever core for that

Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      0a097ba5
    • Alexey Brodkin's avatar
      arc: Get rid of handwritten string routines · 2178817c
      Alexey Brodkin authored 
      
U-Boot is a bit special piese of software because it is being
only executed once on power-on as compared to operating system
for example. That's why we don't care much about performance
optimizations instead we're more concerned about size. And up-to-date
compilers might produce much smaller code compared to
performance-optimized routines copy-pasted from the Linux kernel.

Here's an example:
------------------------------->8--------------------------
--- size_asm_strings.txt
+++ size_c_strings.txt
@@ -1,2 +1,2 @@
    text	   data	    bss	    dec	    hex	filename
- 121260	   3784	   3308	 128352	  1f560	u-boot
+ 120448	   3784	   3308	 127540	  1f234	u-boot
------------------------------->8--------------------------

See we were able to shave off ~800 bytes of .text section.

Also usage of string routines implemented in C gives us an ability
to support more HW flavors for free: generated instructions will match
our target as long as correct compiler option is used.

Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      2178817c
  3. Mar 20, 2018
  5. Mar 19, 2018