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RW_MGR_MEM_NUMBER_OF_RANKS, RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM,
RW_MGR_MEM_DQ_PER_READ_DQS, RW_MGR_MEM_DQ_PER_WRITE_DQS,
RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS,
RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS);
debug_cond(DLEVEL == 1,
"dqs=%u,%u dq=%u dm=%u ptap_delay=%u dtap_delay=%u ",
RW_MGR_MEM_IF_READ_DQS_WIDTH, RW_MGR_MEM_IF_WRITE_DQS_WIDTH,
RW_MGR_MEM_DATA_WIDTH, RW_MGR_MEM_DATA_MASK_WIDTH,
IO_DELAY_PER_OPA_TAP, IO_DELAY_PER_DCHAIN_TAP);
debug_cond(DLEVEL == 1, "dtap_dqsen_delay=%u, dll=%u",
IO_DELAY_PER_DQS_EN_DCHAIN_TAP, IO_DLL_CHAIN_LENGTH);
debug_cond(DLEVEL == 1, "max values: en_p=%u dqdqs_p=%u en_d=%u dqs_in_d=%u ",
IO_DQS_EN_PHASE_MAX, IO_DQDQS_OUT_PHASE_MAX,
IO_DQS_EN_DELAY_MAX, IO_DQS_IN_DELAY_MAX);
debug_cond(DLEVEL == 1, "io_in_d=%u io_out1_d=%u io_out2_d=%u ",
IO_IO_IN_DELAY_MAX, IO_IO_OUT1_DELAY_MAX,
IO_IO_OUT2_DELAY_MAX);
debug_cond(DLEVEL == 1, "dqs_in_reserve=%u dqs_out_reserve=%u\n",
IO_DQS_IN_RESERVE, IO_DQS_OUT_RESERVE);
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hc_initialize_rom_data();
/* update info for sims */
reg_file_set_stage(CAL_STAGE_NIL);
reg_file_set_group(0);
/*
* Load global needed for those actions that require
* some dynamic calibration support.
*/
dyn_calib_steps = STATIC_CALIB_STEPS;
/*
* Load global to allow dynamic selection of delay loop settings
* based on calibration mode.
*/
if (!(dyn_calib_steps & CALIB_SKIP_DELAY_LOOPS))
skip_delay_mask = 0xff;
else
skip_delay_mask = 0x0;
pass = run_mem_calibrate();
printf("%s: Calibration complete\n", __FILE__);
return pass;
}