- Jul 29, 2013
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Marek Vasut authored
There is no need to init this field at runtime, so init it statically. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
The QH_MAXNUM is used in absolutelly incorrect manner and is not even needed. Remove it and correctly replace it's occurance with 2 * NUM_ENDPOINTS . Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
Clean up the code that checks the validity of a USB gadget driver in usb_gadget_register_driver(). Moreover, limit the speed of the driver to either FULL or HIGH, this is more precise and once we have xHCI support, also more correct. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
The usb_lowlevel_init() call already fills and passes back struct ehci_ctrl , which readily contains correctly determined address of the port register block address computed from values from controller configuration registers. Leverage this and make use of this value as this makes the code mode universal, but also gets us rid of the CONFIG_USB_REG_BASE configuration option. Moreover, this patch cleans up the usb_gadget_register_driver() call a little by correcting the error handling. Note the usb_lowlevel_init() and mvudc_probe() are now called in reversed order, but this has no impact on the code. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
Move the struct ehci_ctrl defition from ehci-hcd.c into ehci.h so it can be re-used by drivers. In particular, the mv_udc driver can benefit from this move. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
Move the constant values that are programmed into mv_ep.ep into separate static const structure so they can be memcpy()'d when the initialization happens. Moveover, we only every init NUM_ENDPOINTS, not 2 * NUM_ENDPOINTS, so fix this bug as well. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
The endpoints are operated on a per-controller basis, move the endpoint array into controller's private data. Also shuffle the struct mv_ep structure definition just above the definition of the struct mv_drv so they're well grouped together. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
The mv_udc driver is broken for a while and doesn't even compile. This patch fixes the issues and gets the driver into working state again. This driver was tested on Freescale i.MX233/i.MX28 . Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
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- Jul 25, 2013
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Kuo-Jung Su authored
While the flash_detect_legacy() of drivers/mtd/cfi_flash.c feed unmap_physmem() with MAP_NOCACHE as 2nd parameter, the do_spi_flash_read_write() of common/cmd_sf.c feed unmap_physmem() with the length of the mapped buffer as 2nd parameter. It's apparently a bug, and I personally think the 2nd parameter should be the length of the mapped buffer. Signed-off-by:
Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Stefan Roese <sr@denx.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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Tom Rini authored
Acked-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Tom Rini <trini@ti.com>
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- Jul 24, 2013
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Gabor Juhos authored
Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
The pcnet driver uses the pci_phys_to_mem function to get the memory address of the DMA buffers. This This assumes an 1:1 mapping between the PCI and physical memory which is not true on all platforms. On MIPS platform U-Boot is running within a mapped memory region, and the pci_phys_to_mem macro can't be used to obtain the memory address of the buffers. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by:
Tom Rini <trini@ti.com>
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Gabor Juhos authored
Even though the header files is used only by the pci_ftpci100 driver, it contains declaration for a function which is used by external code. Move the header file to a common location which lets external code use it. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by:
Gabor Juhos <juhosg@openwrt.org>
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Gabor Juhos authored
The pci_ftpci_init() function is implemented in 'drivers/pci/pci_ftpci100.c' however it is always called by external code. Add function declaration into ftpci100.h to make it visible for external code. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by:
Gabor Juhos <juhosg@openwrt.org>
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Gabor Juhos authored
Add a const keyword to the sect_buf argument of ide_write_data to fix the following warning: cmd_ide.c: In function '__ide_output_data': cmd_ide.c:548: warning: passing argument 2 of 'ide_write_data' discards qualifiers from pointer target type /devel/u-boot.git/include/ide.h:76: note: expected 'ulong *' but argument is of type 'const ulong *' Also modify the driver-model documentation to match with the new prototype. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by:
Gabor Juhos <juhosg@openwrt.org>
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Gabor Juhos authored
The FTSDC010_DCR_FIFO_RST symbol is conditionally defined in <faraday/ftsdc010.h> and it is available available when CONFIG_FTSDC010_SDIO is enabled. However the actual driver code unconditionally uses the FTSDC010_DCR_FIFO_RST constant and this causes build error if CONFIG_FTSDC010_SDIO is not enabled. The following error happens when compiling for the adp-ag101 board: ftsdc010_mci.c: In function 'ftsdc010_request': ftsdc010_mci.c:178: error: 'FTSDC010_DCR_FIFO_RST' undeclared (first use in this function) ftsdc010_mci.c:178: error: (Each undeclared identifier is reported only once ftsdc010_mci.c:178: error: for each function it appears in.) The patch ensures that the FTSDC010_DCR_FIFO_RST symbol gets used only if CONFIG_FTSDC010_SDIO is defined. Compile tested only. Cc: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Reviewed-by:
Kuo-Jung Su <dantesu@faraday-tech.com>
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- Jul 23, 2013
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Kuo-Jung Su authored
Faraday FTI2C010 is a multi-function I2C controller which supports both master and slave mode. This patch simplily implements the master mode only. Signed-off-by:
Kuo-Jung Su <dantesu@faraday-tech.com> CC: Heiko Schocher <hs@denx.de>
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Alison Wang authored
This patch adds support for Vybrid VF610 platform. There are some differences between i.MX6 and Vybrid for I2C controller. (1) The registers' offset are different. (2) The I2C clock divider values are different. (3) In I2C control register, the enable/disable/reset bit is inverted for Vybrid comparing to i.MX6. (4) In I2C status register, the interrupt flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". (5) In I2C status register, the arbitration lost flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". Signed-off-by:
Alison Wang <b18965@freescale.com>
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Dirk Eibach authored
Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Tested-by:
Stefan Roese <sr@denx.de>
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Simon Glass authored
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra i2c driver to support this. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Rather than using a variable in various places, add a single function, tegra_i2c_get_bus(), which returns a pointer to information about a bus. This will make it easier to move to the new i2c framework. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Heiko Schocher authored
- added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by:
Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
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Heiko Schocher authored
- added to soft_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by:
Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
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Heiko Schocher authored
This Patch introduce the new i2c_core file, which holds the I2C core functions, for the rework of the multibus/ multiadapter support. Also adds changes in i2c.h for the new I2C multibus/multiadapter support. This new support can be activated with the CONFIG_SYS_I2C define. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
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- Jul 19, 2013
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Fabio Estevam authored
Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the checking for ESTATUS_1000_XHALF, but it incorrectly sets the SUPPORTED_1000baseX_Full flag in this case. Set the SUPPORTED_1000baseX_Half flag instead. Acked-by:
Charles Coldwell <coldwell@gmail.com> Reviewed-By:
Sascha Silbe <t-uboot@infra-silbe.de> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Sascha Silbe authored
de1d786e [add support for Xilinx 1000BASE-X phy (GTX)] introduced a check for the extended status register in order to support 1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since Extended Status only indicates what the PHY (i.e. the local side) is capable of, this broke communication with non-1Gbps peers. Only check the extended status if the 1000BASE-T registers are actually missing so we don't end up setting speed to 1Gbps even though the previous test (for the combination of local and peer support for 1Gbps) already indicated we can't do 1Gbps with the current peer. Signed-off-by:
Sascha Silbe <t-uboot@infra-silbe.de> Tested-by:
Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com>
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- Jul 16, 2013
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Dirk Behme authored
Dealing with the sys ctrl register should touch only the relevant bits and not accidently the whole register. On i.MX6, the sys control register contains bits which shouldn't be reset to 0, e.g. SYS_CTRL[3-0] and IPP_RST_N (SYS_CTRL[23]). Do this by read/modify/write instead of just a 32bit write. Signed-off-by:
Dirk Behme <dirk.behme@de.bosch.com> Acked-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Andy Fleming <afleming@freescale.com>
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Alexey Brodkin authored
1. No contents of "asm/arch/clk.h" is used within "dw_mmc.c". 2. If arch doesn't have "asm/arch/clk.h" driver won't build. Without mentioned inclusion dw_mmc driver could be built for arches other than ARM. For ARM driver still builds without it. Signed-off-by:
Alexey Brodkin <abrodkin@synopsys.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Amar <amarendra.xt@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
Andy Fleming <afleming@freescale.com>
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Haijun.Zhang authored
Fill the right command type when using CMD12 to stop data transfer. Signed-off-by:
Haijun Zhang <Haijun.Zhang@freescale.com> CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> CC: Scott Wood <scottwood@freescale.com> Signed-off-by:
Andy Fleming <afleming@freescale.com>
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Dirk Eibach authored
Add support for Atmel TPM devices with two wire interface. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Reinhard Pfau <reinhard.pfau@gdsys.cc> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Andy Fleming <afleming@freescale.com>
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Reinhard Pfau authored
if alen is 0: no longer start a write cycle before reading data. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Reinhard Pfau <reinhard.pfau@gdsys.cc> Acked-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Andy Fleming <afleming@freescale.com>
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- Jul 12, 2013
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Marek Vasut authored
The driver triggered a BUG() in nand_base.c:3214/nand_scan_tail() because the ecc.strength was not set in NAND_ECC_HW_SYNDROME ECC mode. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
The MX28 multi-layer AHB bus can be too slow and trigger the FEC DMA too early, before all the data hit the DRAM. This patch ensures the data are written in the RAM before the DMA starts. Please see the comment in the patch for full details. This patch was produced with an amazing help from Albert Aribaud, who pointed out it can possibly be such a bus synchronisation issue. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by:
Fabio Estevam <fabio.estevam@freescale.com> Tested-by:
Alexandre Pereira da Silva <aletes.xgr@gmail.com>
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Marek Vasut authored
Remove incorrectly called and duplicate flush_dcache_range() call from fec_mxc driver. The call is not needed, since the caches are already flushed in fec_tbd_init(), moreover the second argument should be the ending address, not size. Signed-off-by:
Marek Vasut <marex@denx.de> Reported-by:
Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
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- Jul 11, 2013
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Jim Lin authored
Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by:
Jim Lin <jilin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- Jul 10, 2013
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Mike Dunn authored
Newer gcc versions warn about unused variables. This patch corrects a few of those warnings that popped up in a build for the palmtreo680 board. Signed-off-by:
Mike Dunn <mikedunn@newsguy.com>
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Łukasz Majewski authored
The DFU's state machine original implementation author and copyright were missing. Signed-off-by:
Lukasz Majewski <l.majewski@samsung.com> Acked-by:
Stefan Schmidt <stefan@datenfreihafen.org>
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