- May 10, 2017
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Álvaro Fernández Rojas authored
This way we can see output about u-boot.elf being built or not. Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Álvaro Fernández Rojas authored
Define PLATFORM_ELFFLAGS for MIPS in order to be able to generate u-boot.elf Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com>
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Álvaro Fernández Rojas authored
LD gives the following warning when trying to process u-boot-elf.o warning: cannot find entry symbol __start; defaulting to 0000000080010000 According to gnu-libc the entry symbol for mips is __start and not _start: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/mips/dl-machine.h;h=ed47513ccc1d23d23d32ee640053d2f351f3990b;hb=HEAD#l258 Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Álvaro Fernández Rojas authored
This is needed in order to allow building it for other archs. Move relocation comment to a better place. Remove no longer needed dts FIXME. Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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- May 09, 2017
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git://git.denx.de/u-boot-dmTom Rini authored
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Jean-Jacques Hiblot authored
Enable disk driver model for dra7xx_evm as dwc_ahci supports driver model. As a consequence we must also enable CONFIG_BLK and CONFIG_DM_USB. Signed-off-by:
Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Dropped CONFIG_SPL_PHY=y in sandbox_spl to fix build error: Signed-off-by:
Simon Glass <sjg@chromium.org>
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Jean-Jacques Hiblot authored
Implement a sata driver for Synopsys DWC sata device based on U-boot driver model. Signed-off-by:
Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Jean-Jacques Hiblot authored
This is needed to probe devices under that bus such as the SATA PHY. Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Jean-Jacques Hiblot authored
This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Jean-Jacques Hiblot authored
Those tests check: - the ability for a phy-user to get a phy based on its name or its index - the ability of a phy device (provider) to manage multiple ports - the ability to perform operations on the phy (init,deinit,on,off) - the behavior of the uclass when optional operations are not implemented Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Jean-Jacques Hiblot authored
The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree. Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Jean-Jacques Hiblot authored
The DM version of scsi_scan() is becoming a bit long, it can be split: scsi_scan() iterates over the IDs and LUNs and for each id/lun pair calls do_scsi_scan_one() to do the work of: - detecting an attached drive - creating the associated block device if a drive is found. Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Because the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Since the introduction of the pinctrl and clk driver and the device tree files, remove unneeded related code from the board file. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Since the introduction of the pinctrl and clock driver and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
The device tree source files of at91sam9263ek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used in board_init_f stage. - Fix the compilation warnings. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
The device tree source files of at91sam9rlek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used in board_init_f stage. - Fix the compilation warnings. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
The device tree source files of at91sam9g20ek and at91sam9260ek boards are copied from the Linux v4.10, do the changes below. - Fix the build error for the usb0 node. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used in board_init_f stage. - Add the clk pinctrl of the mmc0 node. - Fix the compilation warnings. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
The device tree source files of at91sam9m10g45ek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Fix the compilation warnings. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
The device tree source files of at91sam9n12ek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Change the compatible of the spi flash to "spi-flash". - Add the spi0 aliases. - Fix the pinctrl-names of mmc0 node. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Fix the compilation warnings. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
The device tree source files of at91sam9x5ek board are copied from the Linux v4.10, do the changes below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Change the compatible of the spi flash to "spi-flash". - Add the spi0 aliases. - Fix the compilation warnings. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Add the clock support. Note that the clock handling of the DBGU peripheral is different from the USART. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Add the uart init function to be used on both probe and the early debug uart init. For the latter, the input clock should be from CONFIG_DEBUG_UART_CLOCK. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou Yang authored
Align the at91 pmc's compatibles with kernel. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Andreas Bießmann <andreas@biessmann.org>
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