Add generic EHCI node for the ChipIdea EHCI controller in the ath79.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>

The assignment const T var; var = value; is illegal, since var is
constant. Drop the const to fix the compiler warning.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>

The indent in this file triggers my OCD, so fix it. Replace multiple
spaces with tabs and align the values in one column.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>

Add MIPS 74Kc tune Kconfig option.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
[added missing tune-y entry in arch/mips/Makefile]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

There really is zero reason for including netdev.h in generic mips CPU code.
Removing the netdev.h from cpu.c also fixes the following compiler warning:

In file included from arch/mips/cpu/cpu.c:10:0:
include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default]
 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
                                         ^
include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

use 'const' keywork to qualify readonly attribute for lookup-table member

Signed-off-by: Wills Wang <wills.wang@live.com>

used a uniform BIT macro for register bit-field shift

Signed-off-by: Wills Wang <wills.wang@live.com>

The correct pinctrl is handled automatically so we don't need to do it in
the driver.

Signed-off-by: Wills Wang <wills.wang@live.com>

The correct pinctrl is handled automatically so we don't need to do it in
the driver.

Signed-off-by: Wills Wang <wills.wang@live.com>

Signed-off-by: Tim Chick <tim.chick@mediatek.com>

PIC32 internal flash devices are parallel NOR flash divided into
number of banks to allow erase-programming in one while fetch and
execution continues on other. As the flash banks are memory mapped
stored code can be executed directly from flash (XIP), also there
is additional hardware logic to prefetch and cache contents to
improve execution performance. These flash can also be used to
store user data (like environment).
Flash erase and programming are handled by on-chip NVM controller.

Driver implemented driver model but MTD is not really support.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Microchip PIC32 has internal parallel flash (non-CFI compliant).
These flash devices do not support any identifier command so no
standard IDs. Added unique IDs to seperate these flash devices
from others supported by U-Boot.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

This patch add board-level code and base DT for AP143.

Signed-off-by: Wills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

This patch add board-level code and base DT for AP121.

Signed-off-by: Wills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

This patch add a compatible spi driver for ath79 series SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

This patch add support for ar933x serial.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

This patch enable work for qca953x SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>

This patch enable work for ar933x SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>

This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset and CPU detection.

Signed-off-by: Wills Wang <wills.wang@live.com>

Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>

Specifically tested on MIPS under QEMU (works with all  combination of bit-ness and endian-ness)

Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>

Use CONFIG_IDE_SWAP_IO when running on big-endian MIPS (32 or 64-bit) in QEMU so that IDE transfers work properly

Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>

Properly calculate ATA_SECTORWORDS, using a fixed-size integer, so it works for both 32-bit and 64-bit targets

Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>

Add a simple test which checks that a sandbox-emulated SD card can be used
correctly. This tests plumbing through the MMC stack's block-device
implementaion.

Signed-off-by: Simon Glass <sjg@chromium.org>

Enable building the MMC code for sandbox. This increases build
coverage for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add an emulation of an SD card to sandbox, allowing MMC to be used in tests.
The emulation is very simple, supporting only card detection and reading
test data.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add support for enabling CONFIG_BLK with MMC. This involves changing a
few functions to use struct udevice and adding a MMC block device driver.

Signed-off-by: Simon Glass <sjg@chromium.org>

Binding an MMC device when CONFIG_BLK is enabled requires that a block
device be bound as a child of the MMC device. Add a function to do this.
The mmc_create() method will be used only when DM_BLK is disabled.

Add an unbind method also.

Signed-off-by: Simon Glass <sjg@chromium.org>

Implement the functions in mmc_legacy.c for driver-model block devices, so
that MMC can use driver model for these. This allows CONFIG_BLK to be enabled
with DM_MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>

This driver will require generic MMC and block-device support in a future
commit. To avoid test errors, make this change now.

Signed-off-by: Simon Glass <sjg@chromium.org>

Instead of looking up the MMC device by number, just pass it in. This makes
it possible to use this function with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>

Return -EINVAL instead of -1 in this function, to provide a more meaningful
error.

Signed-off-by: Simon Glass <sjg@chromium.org>

At present the MMC subsystem maintains its own list of MMC devices. This
cannot work with driver model, which needs to maintain this itself. Move the
list code into a separate 'legacy' file. The core MMC code remains, and will
be shared with the driver-model implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>

Update the existing drivers to set up this new pointer. This will be required
by the MMC uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>

This member should be explained, since it is not obvious why it is needed.
Add a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>

This is not needed since we can use the functions provided by the legacy
block device support.

Signed-off-by: Simon Glass <sjg@chromium.org>