Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/imx6qdl_icore_mmc_defconfig
	configs/imx6qdl_icore_rqs_defconfig

- add {ofnode,dev}_read_resource_byname
- provide DT probe hook to Denali NAND driver
- update clk/reset driver
- update DT
- misc cleanups

When enabling the new mmc timing mode, we inadvertently clear all the
remaining bits in the new timing mode register. The bits cleared
include a default phase delay on the output clock. The BSP kernel
states that the default values are supposed to be used. Clearing them
results in decreased performance or transfer errors on some boards.

Fixes: de9b1771 ("mmc: sunxi: Support new mode")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Add Falcon mode support in Engicam i.CoreM6 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Memory dt node update introduced by spl_fixup_fdt() in below
commit was making DDR configuration in-appropriate
to boot falcon mode. Hence added dram_init_banksize for
explicit assignment of  proper base and size of DDR.

"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot"
(sha1: 6e7585bb)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
boot mode, hence remove it from the boot device detecion. This
fixes a build error introduced with 3bd1642d ("imx: fix USB
boot mode detection for i.MX 6UL and 6ULL")

Fixes: 3bd1642d ("imx: fix USB boot mode detection for i.MX 6UL and 6ULL")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>

U-boots spi-nor support is currently considered a work in progress. For
now to avoid issues it is necessary to add a "spi-flash" compatible
string. Eventually the "jedec,spi-nor" will be sufficient when the core
U-boot code is updated to support it.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Stefan Roese <sr@denx.de>

Now the entry to the NAND driver init can be is controlled by DT;
it should not hurt to compile the driver all the time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The system bus is not enabled by default for NAND, eMMC boot
etc. of PXs3.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This imply was added when the option was moved by the moveconfig tool,
but the intention is not clear.  Move it to defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Support PXs3 SoC and its reference development board.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Import updates queued up for Linux 4.14-rc1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

LD20 has SD ctrl instead of MIO ctrl.  LD11 has both of them.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Support system clocks for LD4, Pro4, sLD8, Pro5, PXs2/LD6b, LD11, LD20.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This is now set up by the pinctrl driver when the NAND driver is
probed.  Remove the legacy code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Migrate to the DT-based NAND init entry.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

CONFIG_NAND_DENALI select's CONFIG_SYS_NAND_SELF_INIT, so the
NAND initialization process is driven by the driver itself.
CONFIG_SYS_NAND_MAX_CHIPS and CONFIG_SYS_NAND_BASE are unused.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The new SoC PXs3 changed the address of PLL, but still uses the
same PLL name.  We can not define SC_*PLLCTRL in the common header.
Move them to per-SoC .c file.  Also, fix some PLL comments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The #include <common.h> was added for mdelay().  Later, the declaration
of mdelay was moved to <linux/delay.h> by commit 5bc516ed ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").

There is no need to include <common.h> now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

A patch for NAND uclass support was proposed about half a year ago:
https://patchwork.ozlabs.org/patch/722282/



It was not merged and I do not see on-going work for this.

Without DM-based probing, we need to set up pinctrl etc. in an ad-hoc
way and give lots of crappy CONFIG options for base addresses and
properties, which are supposed to be specified by DT.  This is painful.

This commit just provides a probe hook to retrieve "reg" from DT and
allocate private data in a DM manner.  This DT driver is not essentially
a NAND driver, in fact it is (ab)using UCLASS_MISC.  Once UCLASS_NAND is
supported, it would be possible to migrate to it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Linux supports platform_get_resource_byname() to look up a resource
by name.

We want a similar helper.  It is useful when a device node has named
register regions.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

U-Boot proper is using DM_MMC so, enable CONFIG_BLK otherwise
find_mmc_device failed to detect MMC device.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>

The soc_boot_modes array is only used by bmode command
and not needed in SPL. Don't include it into SPL.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>

The GPT timer was already initialised in board_init_f() as
it is needed in dram init. Do not repeat timer init in
board_init_r().

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

There is no need to clear the control register 100 times in a
loop, a single zero write clears the register. I didn't find any
justification why clearing this register in a loop is needed
(no info in i.MX6 errata or GPT timer linux driver, linux driver
uses single write to clear this control register).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

In case of 2 banks, the address space of the first CS must be defined
and not let to the higher value.

Add support for SOM with a single bank of RAM. It was tested with i.MX6Q
modules in the following configurations:

- 2 Banks, 4 GB
- 2 Banks, 1 GB
- 1 Bank,  1 GB

Signed-off-by: Stefano Babic <sbabic@denx.de>

Signed-off-by: Tom Rini <trini@konsulko.com>

We see the choice of USB_DWC3_HOST / _GADGET in drivers/usb/dwc3/Kconfig,
but we can not choose USB_DWC3_HOST unless USB_GADGET is defined.
This is strange.

Loosen the "depends on" and also move "select USB_GADGET_DUALSPEED" to
the correct place.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The driver-model rework changed, among other things, the way the private
data were moved around. It now uses the private field in the struct mmc.

However, the mmc_create argument was changed in the process to always pass
the array we used to have to store our private structures.

The basically means that all the MMC driver instances will now have the
private data of the first instance, which obviously doesn't work very well.

Pass the proper pointer to mmc_create.

Fixes: 034e226b ("dm: mmc: sunxi: Pass private data around explicitly")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Add CONFIG_MMC_SUNXI_SLOT_EXTRA=2 to use eMMC on
BPI_M3 board.

Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>

The eMMC controller for the A83T uses the new operating mode. Enable it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Almost all of the newer Allwinner SoCs have a new operating mode for the
eMMC clocks that needs to be enabled in both the clock and the MMC
controller.

Details about that mode are sparse, and the name itself (new mode vs old
mode) doesn't give much details, but it seems that the it changes the
sampling of the MMC clock. One side effect is also that it divides the
parent clock rate by 2.

Add support for it through a Kconfig option.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Before commit 26d61195 (fdt: Move fdt_fixup_ethernet to a common place)
the fdt_fixup_ethernet(...) was called during do_bootvx_fdt(...).

Afterwards the only (common) place for this fixup is during
image_setup_libfdt(...) and this is only called, at least on ARM
platform, from image_setup_linux(...).

All this ends up in the fact, that the fdt_fixup_ethernet(...) is only
called on booting a linux image and not on booting a vxWorks image.

We fix this with adding the fdt_fixup_ethernet(...) call again to
do_bootvx_fdt(...)

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

The silent environment callback function does not update the silent
flag during silent env set or unset. That is because of duplicated
CONFIG keyword at preprocessor condition in silent environment
callback function and cause silent env callback unable to work.

This patch is to remove the duplicated CONFIG keywork in silent
environment callback function.

Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>