- May 24, 2016
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Peng Fan authored
To i.MX6DQPlus, osc can be choosed as the source of gpt, so add i.MX6DQPlus support in gpt_has_clk_source_osc. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
The i.MX6DQPlus support sata interface, we should not return failure when CPU is i.MX6DQPlus. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Support i.MX6DQPlus, otherwise wrong hab address will be used for i.MX6QDPlus. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Ulises Cardenas <Ulises.Cardenas@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Correct get_cpu_speed_grade_hz for i.MX6DQP, otherwise we will get wrong speed grade info i.MX6DQP. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Support i.MX6D/QPlus. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Use simpler runtime cpu dection macros. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
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Peng Fan authored
Add i.MX6SOLO support for hab function. The difference between i.MX6SOLO and i.MX6DL is the number of CPU cores. Besides this, they work the same. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Use simpler runtime cpu dection macros. i.MX6DL and i.MX6SOLO work the same, so use is_mx6sdl. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
i.MX6DL and i.MX6SOLO work the same, add i.MX6SOLO support when enable/disable_ldb_di_clock_sources. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Introduce simpler macros for runtime cpu dection. Signed-off-by:
Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by:
Stefano Babic <sbabic@denx.de>
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git://git.denx.de/u-bootStefano Babic authored
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- May 23, 2016
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git://git.denx.de/u-boot-mipsTom Rini authored
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Masahiro Yamada authored
Commit 11661193 ("ARM: fix ifdefs in ARMv8 lowlevel_init()") accidentally inverted the logic of CONFIG_ARMV8_MULTIENTRY. Fixes: 11661193 ("ARM: fix ifdefs in ARMv8 lowlevel_init()") Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Rini authored
The spl_parse_image_header() can return 0 and it is not an error. Only treat non-zero return value as an error. Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by:
Peng Fan <van.freenix@gmail.com> Reviewed-by:
Stefano Babic <sbabic@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Martin Hejnfelt authored
When the base registers are read from device tree the base is not 0x48030100 as the driver expects, but 0x48030000, resulting in non functioning SPI. To deal with this, use same idea as how this is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and add a structure with a field that is used to shift the registers on these systems. v2: Fixed commit subject line to correct cpu Signed-off-by:
Martin Hejnfelt <mh@newtec.dk>
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Tom Rini authored
Coverity has recently added a check that will find when we don't check the return code from fstat(2). Copy/paste the checking logic that print_deps() has with an appropriate re-wording of the perror() message. [ Linux commit : 46fe94ad18aa7ce6b3dad8c035fb538942020f2b ] Signed-off-by:
Tom Rini <trini@konsulko.com> Signed-off-by:
Michal Marek <mmarek@suse.com>
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Michal Simek authored
OF_LIST can't remain empty that's why setup it up to default DTB. If it is empty u-boot.img is created without FDT partition: For example: ./tools/mkimage -f auto -A arm -T firmware -C none -O u-boot -a 0x8000000 -e 0 -n "U-Boot 2016.05-rc3 ..." -E -b -d u-boot-nodtb.bin u-boot.img Can't set 'timestamp' property for '' node (FDT_ERR_NOSPACE) FIT description: Firmware image with one or more FDT blobs Created: Wed May 4 15:02:52 2016 Image 0 (firmware@1) Description: U-Boot 2016.05-rc3-00080-gff2e12ae22a8-dirty for zynqmp board Created: Wed May 4 15:02:52 2016 Type: Firmware Compression: uncompressed Data Size: unavailable Architecture: ARM Load Address: 0x08000000 Default Configuration: 'conf@1' Configuration 0 (conf@1) Description: unavailable Kernel: unavailable And then image like this doesn't contain description and link to FDT and can't boot. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Michal Simek authored
When FDT is not present in the image user doesn't get any error what's wrong. Print error message if LIBCOMMON_SUPPORT is enabled. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Seris-cc: uboot Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Some build systems want to be quiet unless there is a problem. At present mkimage displays quite a bit of information when generating a FIT file. Add a '-q' flag to silence this. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Joe Hershberger <joe.hershberger@ni.com>
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Simon Glass authored
This function returns an error code and its caller may be able to fix the error. For example fit_handle_file() expands the device tree to fit if there is a lack of space. In this case the caller does not want an error displayed. It is confusing, since it suggests that something is wrong, when it fact everything is fine. Drop the error. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Stephen Warren authored
Commit 4f144a41 "malloc: work around some memalign fragmentation issues" enhanced memalign() so that it can succeed in more cases where heap fragmentation is present. However, it did not solve as many cases as it could. This patch enhances the code to cover more cases. The alignment code works by allocating more space than the user requests, then adjusting the returned pointer to achieve alignment. In general, one must allocate "alignment" bytes more than the user requested in order to guarantee that alignment is possible. This is what the original code does. The previous enhancement attempted a second allocation if the padded allocation failed, and succeeded if that allocation just happened to be aligned; a fluke that happened often in practice. There are still cases where this could fail, yet where it is still possible to honor the user's allocation request. In particular, if the heap contains a free region that is large enough for the user's request, and for leading padding to ensure alignment, but has no or little space for any trailing padding. In this case, we can make a third(!) allocation attempt after calculating exactly the size of the leading padding required to achieve alignment, which is the minimal over-allocation needed for the overall memalign() operation to succeed if the third and second allocations end up at the same location. This patch isn't checkpatch-clean, since it conforms to the existing coding style in dlmalloc.c, which is different to the rest of U-Boot. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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- May 21, 2016
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Fabio Estevam authored
Select CONFIG_HUSH_PARSER option in order to fix the following problem: Unknown command 'if' - try 'help' Unknown command 'then' - try 'help' Unknown command 'else' - try 'help' Unknown command 'fi' - try 'help' Reported-by:
Daiane Angolini <daiane.angolini@nxp.com> Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Tested-by:
Daiane Angolini <daiane.angolini@nxp.com>
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Nikita Kiryanov authored
Merge the parsing of layout aware and layout unaware eeprom commands into one parsing function. With this change, layout aware commands now follow the eeprom read and eeprom write conventions of making i2c bus and i2c address parameters optional. Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il>
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Nikita Kiryanov authored
Update eeprom_execute_command() and related code to accommodate both layout aware and layout unaware functions. No functional changes. Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> [trini: Make eeprom_execute_command have ulong for i2c_addr] Signed-off-by:
Tom Rini <trini@konsulko.com>
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- May 20, 2016
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Paul Burton authored
Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6 CPUs. Allow building U-Boot for such systems by selecting CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta. Signed-off-by:
Paul Burton <paul.burton@imgtec.com>
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Paul Burton authored
We always build for a mips32 or higher ISA, so this ".set mips32" directive is redundant. Once MIPSr6 support is added it will become harmful since some instruction encodings change & this directive will cause the older encodings to be incorrectly emitted instead of the appropriate ones for the build. In preparation for supporting MIPSr6, remove this redundant directive. Signed-off-by:
Paul Burton <paul.burton@imgtec.com>
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Paul Burton authored
Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by:
Paul Burton <paul.burton@imgtec.com>
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Paul Burton authored
Rather than having the values for CONFIG_SYS_CPU depend upon each architecture revision, have them depend upon the more general CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the architecture revisions. This is done in preparation for adding MIPSr6 support, which would otherwise need to introduce new cases here. Signed-off-by:
Paul Burton <paul.burton@imgtec.com>
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Paul Burton authored
In MIPS assembly there have historically been 2 variants of immediate addition - the standard "addi" which traps if an overflow occurs, and the unchecked "addiu" which does not trap on overflow. In release 6 of the MIPS architecture the trapping variants of immediate addition & subtraction have been removed. In preparation for supporting MIPSr6, stop using the trapping instructions from assembly & switch to their unchecked variants. Signed-off-by:
Paul Burton <paul.burton@imgtec.com>
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Marek Vasut authored
Add support for the TPLink WDR4300 router, which is based on the AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported on this system as well. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
Add code to ungate the ethernet controller on ar933x and ar934x . Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
Add node for both ethernet controllers in the ar933x. The PHY is attached only to the first ethernet controller. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
Add generic EHCI node for the ChipIdea EHCI controller in the ath79. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
The assignment const T var; var = value; is illegal, since var is constant. Drop the const to fix the compiler warning. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
The indent in this file triggers my OCD, so fix it. Replace multiple spaces with tabs and align the values in one column. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
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Marek Vasut authored
Add MIPS 74Kc tune Kconfig option. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com> [added missing tune-y entry in arch/mips/Makefile] Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Marek Vasut authored
There really is zero reason for including netdev.h in generic mips CPU code. Removing the netdev.h from cpu.c also fixes the following compiler warning: In file included from arch/mips/cpu/cpu.c:10:0: include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default] int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); ^ include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Wills Wang authored
use 'const' keywork to qualify readonly attribute for lookup-table member Signed-off-by:
Wills Wang <wills.wang@live.com>
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