As per updated hardware documentation for
lsch3 based chips like LS2088A, 0.9v support
has been added in possible supported SoC volatges

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

After the commit 9b643e31 ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>

After the commit 9b643e31 ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>

If building envtools, there is env directory in tools directory.
Mafe the get_default_envs.sh script exclude tools/env directory.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>

Add timestamp to each iotrace record to aid in debugging
of IO timing access bugs.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

When dealing with a lot of IO regions, sometimes
it makes sense only to trace a specific one.
This patch adds support for region limits.
If region is not set, the iotrace works the same as it was.
If region is set, the iotrace only logs io operation that falls
in the defined region.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add WARN_ONCE definition to allow single time notification
of warnings to the user.
Taken from Linux kernel (4.17) with slight changes
(Removed __section(.data.once))

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
[trini: Drop the musb and dwc3 compat versions]
Signed-off-by: Tom Rini <trini@konsulko.com>

When dealing with filesystems that come from block devices we can get a
noticeable performance gain in some use cases from having the block
cache enabled.  The code paths are valid in other cases when we have BLK
set and may provide wins in raw reads in some use cases, so have this be
default when BLK is enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

The lowlevel_init function uses r4 and r6 without preserving their
values as required by the AAPCS.  Use r0 and r2 instead as these
are call-clobbered.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>

Since commit 0e373c0a ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.

This allows to remove a specific case in RCC mfd driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Add DM support for the Marvell RTC driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

Split the rtc_{get,set,reset} functions so that the bodies can be used
in a DM driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

In case of no relocation we'll just waste some space at the very end
of usable memory area. If target device has very limited amount of memory
(for example 256 kB) this loss will be pretty inconvenient.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>

Reading doc/README.distro , we see platform needs to set
pxefile_addr_r to support distro boot.

Signed-off-by: Riku Voipio <riku.voipio@linaro.org>

For distro-boot, the TIMEOUT directive in the boot script specifies
how long to pause in units of 1/10 sec. [1]

Commit 8594753b ("menu: only timeout when menu is displayed")
corrected this by simply dividing the timeout value by 10 in
menu_interactive_choice().

I see two problems:

 - For example, "TIMEOUT 5" should wait for 0.5 sec, but the current
   implementation cannot handle the granularity of 1/10 sec.
   In fact, it never breaks because "m->timeout / 10" is zero,
   which means no timeout.

 - The menu API is used not only by cmd/pxe.c but also by
   common/autoboot.c .  For the latter case, the unit of the
   timeout value is _second_ because its default is associated
   with CONFIG_BOOTDELAY.

To fix the first issue, use DIV_ROUND_UP() so that the timeout value
is rounded up to the closest integer.

For the second issue, move the division to the boundary between
cmd/pxe.c and common/menu.c .  This is a more desirable place because
the comment of struct pxe_menu says:

 * timeout - time in tenths of a second to wait for a user key-press before
 *           booting the default label.

Then, the comment of menu_create() says:

 * timeout - A delay in seconds to wait for user input. If 0, timeout is
 * disabled, and the default choice will be returned unless prompt is 1.

[1] https://www.syslinux.org/wiki/index.php?title=SYSLINUX#TIMEOUT_timeout



Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

In commit e163a931 ("cmd: gpt: backup boot code before writing MBR")
there was added the procedure for storing old boot code when doing "gpt
write". But instead of storing just backup code, the whole MBR was
stored, and only specific fields were replaced further, keeping
everything else intact. That's obviously not what we want.

Fix the code to actually store only old boot code and zero out
everything else. This fixes next testing case:

    => mmc write $loadaddr 0x0 0x7b
    => gpt write mmc 1 $partitions

In case when $loadaddr address and further memory contains 0xff, the
board was bricked (ROM-code probably didn't like partition entries that
were clobbered with 0xff). With this patch applied, commands above don't
brick the board.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Alejandro Hernandez <ajhernandez@ti.com>
Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com>

This updates the LEGO MINDSTORMS EV3 boot script to try loading a
uEnv.txt file and a da850-lego-ev3.dtb device tree during boot.

Signed-off-by: David Lechner <david@lechnology.com>

This removes the unused clock and RAM config options that were cargo-
culted when this board was copied from the DA850 EVM.

Signed-off-by: David Lechner <david@lechnology.com>

This disables networking related items in the config. The EV3 does not have
any networking hardware, so this is wasted space.

Signed-off-by: David Lechner <david@lechnology.com>

This moves the UART init for LEGO MINDSTORMS EV3 to board_early_init_f().
Some console messages were not being printed because the UART was not
enabled until later in the init process.

Signed-off-by: David Lechner <david@lechnology.com>

This increases the kernel image to 4M and the rootfs image to 10M.

It is getting hard to get a kernel image to fit in 3M.

Signed-off-by: David Lechner <david@lechnology.com>

The u-boot binary sits in flash immediately before the environment.
Don't allow the binary size to grow into the environment space.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

The u-boot binary sits in flash immediately before the environment.
Don't allow the binary size to grow into the environment space.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

Without this, u-boot.kwb overlaps where the u-boot environment is
stored, and updating the environment can break u-boot and vice versa.

  https://bugs.debian.org/897671
  https://lists.denx.de/pipermail/u-boot/2018-May/327497.html



Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefan Roese <sr@denx.de>

The SBx81LIFKW boards connect to the internal chassis management network
via a Marvell 88e6097 L2 switch. The chassis connections are direct
serdes on ports 8 and 9 with a RGMII interface on port 10 connected to
the CPU MAC.

For debugging purposes ports 0 and 1 are also taken out to headers on
the board. Because the debug interfaces are sometimes connected to with
straight ribbon cables we need to run them at 10Mbps.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

This is a series of line cards for Allied Telesis's SBx8100 chassis
switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16
and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

The mach/config.h file would helpfully define CONFIG_SYS_I2C and
CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This
conflicts with the way DM_I2C works. As a transitional measure don't
automatically define these if CONFIG_DM_I2C is defined. It should be
possible to remove this once all kirkwood boards are migrated to DM.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

This patch shows how to enable driver model support for the LS-CHLv2 and
LS-XHL boards.

There are a couple of open questions:
 - do I need the u-boot,dm-pre-reloc tags in the device tree?
 - should mach/config.h define CONFIG_DM_SEQ_ALIAS?
 - how can we split this patch or are there any other pending patches
   which does the same and I didn't catch these.

This patch is based on the http://git.denx.de/u-boot-marvell.git (master
branch) and needs the following patches, which are still pending:
  https://patchwork.ozlabs.org/patch/909618/
  https://patchwork.ozlabs.org/patch/909617/
  https://patchwork.ozlabs.org/patch/909973/



Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stefan Roese <sr@denx.de>

Synchronize it with the LS-XHL board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

This switches the clearfog boards to use DM based gpio and i2c
drivers.  The io expanders are configured via their device-tree
entries.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

The a38x sata interfaces run in ahci mode and can
be accessed via the scsi command.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: rebase on current upstream]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.

An example of such a card is WLE900VX.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Tom Rini <trini@konsulko.com>

This flash IC is used in some chromebook models
manufactured by Bitland.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

The clean_bar() function resets the SPI NOR BAR register to 0, but
does not set the flash->curr_bar to 0 , therefore those two can get
out of sync, which could ultimatelly result in corrupted flash content.

The simplest test case is this:

  => mw 0x10000000 0x1234abcd 0x4000
  => sf probe
  => sf erase 0x1000000 0x10000
  => sf write 0x10000000 0x1000000 0x10000

  => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000

That is, erase a sector above the 16 MiB boundary and write it with
random pre-configured data. What will actually happen without this
patch is the sector will be erased, but the data will be written to
BAR 0 offset 0x0 in the flash.

This is because the erase command will call write_bar()+clean_bar(),
which will leave flash->bank_curr = 1 while the hardware BAR registers
will be set to 0 through clean_bar(). The subsequent write will also
trigger write_bar()+clean_bar(), but write_bar checks if the target
bank == flash->bank_curr and if so, does NOT reconfigure the BAR in
the SPI NOR. Since flash->bank_curr is still 1 and out of sync with
the HW, the condition matches, BAR programming is skipped and write
ends up at address 0x0, thus corrupting flash content.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>