Add NAND SPL boot support with hardware PMECC.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Prepare for nand spl boot support. It supports nand software ECC and
hardware PMECC.
This patch is take <drivers/mtd/nand/nand_spl_simple.c> as reference.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Add SPI SPL boot support for sama5d3xek board.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
Now it supports boot from NAND flash and SD/MMC card.
Features support:
  - NAND flash
  - SD/MMC card
  - Two USB hosts
  - Ethernet (one GMAC, one EMAC)

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[reorder boards.cfg]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

It's called _pio_ in the version that was added to git.
Apparently it got renamed without updating the macros before it was
applied, c.f.
http://u-boot.10912.n7.nabble.com/U-Boot-PATCH-3-9-V3-add-a-new-AT91-GPIO-driver-td75922.html



Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Add support for using the Atmel MCI driver on at91sam9263ek.
This change is modeled after the existing at91sam9260ek support.

Please note that this hooks up slot1 (MCI1) for SD. Not both.

Tested with at91bootstrap and u-boot on dataflash in slot 0
and fat-formatted 8GB SDHC in slot 1 on first revision
at91sam9263ek (which must use dataflash in slot0 to boot).

CONFIG_ATMEL_MCI_PORTB not tested.

Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se>
[remove empty line]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Enable required clocks for GPIO to fix a boot issue introduced by commit
f33b9bd3 (arm: omap3: Enable clocks for
peripherals only if they are used).

Without this patch the u-boot freezes after the following messages

  OMAP36XX/37XX-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 1 Ghz
  IGEPv2 + LPDDR/NAND
  I2C:   ready
  DRAM:  512 MiB
  NAND:  512 MiB
  MMC:   OMAP SD/MMC: 0

Diving into the issue, the sequence that produces the u-boot freezes is

  setup_net_chip
   |--> gpio_direction_out
         |--> _set_gpio_dataout
               |--> __raw_writel

To avoid this we just need enable the clocks for GPIOs that are used, but it
would be interesting implement a mechanism to protect these situations and
make sure that the clock is enabled when we request a GPIO.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>

B&R boards are using Phy Addresses 'one' and 'two', prior this was
defined through #define PHYADDR 1 within a header file.
Now this is addresses are given with device-driver structure.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

This retrieves a PXE config file over the network, and executes it. This
allows an extlinux config file  to be retrieved over the network and
executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Update the common Tegra boot scripts in the default environment to

a) Make use of the new "test -e" shell command to avoid some error
   messages.

b) Allow booting using the sysboot command and extlinux.conf. This
   allows easy creation of boot menus, and provides a simple interface
   for distros to parameterize/configure the boot process.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Modify all Tegra boards to include the "distro defaults" header, so that
all the config options distros expect are enabled. Remove any #defines
that enable the same options from the Tegra files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Tegra's EHCI controllers only have a single PORTSC register. Configure
U-Boot to know this. This prevents e.g. ehci_shutdown() from touching
non-existent registers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

In order to completely halt the AVP processor, we should simply write
FLOW_MODE_STOP without any extra options that allow wakeup. Amend the
code to do this.

I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by
interrupts. We don't want this; if later SW wishes to use the AVP, it
should be reset and booted from scratch.

Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly
different definition starting with Tegra114, so the values we're
writing don't entirely make sense there anyway.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Tegra124 moved the CSITE block's base address. Fix U-Boot to use
the correct address.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and
Tegra124. Reflect this in pmc.h.

Also, simply write the whole of the register in start_cpu() rather than
doing a read-modify-write; the register is simple enough that the code
can easily construct the entire desired value.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

<asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize
some definitions, since some modules moved between generations. Move
the definition of CONFIG_TEGRAnn to a header that's included earlier,
so that it's set by the time tegra.h needs to use it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Since the switch may be re-configured for VLAN usage in Linux (or any
other OS), lets reset the switch to its default register values upon
power-up. Otherwise network might not be available in U-Boot.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Lukas Stockmann <lukas.stockmann@siemens.com>
Cc: Tom Rini <trini@ti.com>

The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value
of the ddr reset value for DDR3 before the EMIF takes over. We must have
this bit set high so that on exit from DeepSleep0 within the kernel the
reset line has the proper value.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

The register secure_emif_sdram_config in control module is copied to
the EMIF sdram_config register when it is coming out of DeepSleep0 in
order to ensure that the EMIF comes up for the correct type of DDR.
Without this, resume can hang from within the kernel.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl
and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the
desired delay in cycles that the EMIF waits without an access to enter
self-refresh, in this case 8192 cycles. With this, code desiring to
enter self refresh only has to toggle one bit to enable it.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Add Ethernet Boot support to SPL

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Updating EMIF_PHY_CTRL and adding EMIF_READ_WRITE_EXECUTION_THRESHOLD
registers.
In EMIF_PHY_CTRL:
Updating [4:0]READ_LATENCY to 8, because at higher frequencies like
400MHz the read latency expected will be CL+3 as per tests from HW
folks.
Clearing [19]PHY_DIS_CALIB_RST bit as this is used onl for debug
purpose. With out this resume is not working(Still waiting for PHY team
to come back for better explanation).

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also correct the bit masking of mac id read from the efuse.

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also adding mii command support to am335x common config.

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected
to RMII and RGMII phy respectively and enable cpsw in config.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Enable CPGMAC clock control for AM43xx to use ethernet in U-Boot

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards]
Signed-off-by: Tom Rini <trini@ti.com>

Conflicts:
	arch/arm/cpu/armv7/config.mk
	board/ti/am43xx/mux.c
	include/configs/am43xx_evm.h

Signed-off-by: Tom Rini <trini@ti.com>

When we tell the compiler to optimize for ARMv7 (and ARMv6 for that
matter) it assumes a default of SCTRL.A being cleared and unaligned
accesses being allowed and fast at the hardware level.  We set this bit
and must pass along -mno-unaligned-access so that the compiler will
still breakdown accesses and not trigger a data abort.

To better help understand the requirements of the project with respect
to unaligned memory access, the
Documentation/unaligned-memory-access.txt file has been added as
doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1
tag of the kernel.

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tom Rini <trini@ti.com>

While there are valid reasons to use __packed, often the answer is that
you should be doing something else here instead.

Signed-off-by: Tom Rini <trini@ti.com>

Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

This prevents references to _end from generating absolute
relocation records.

This change is binary invariant for ARM targets.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

Newly added cm_t335 was missed in commit 47ed5dd0 which
made ARM targets produce full ELF files. Fix its linker
script.

This change is binary-invariant when only .dynsym, .dynstr,
.dynamic, .plt, .interp and .gun sections are declared.

Sections .hash, .got.plt, .dynbss and .ARM.exidx are also
declared so that their (unused) content is moved out of the
u-boot binary.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

This reverts commit fc0fc50f.

The author has asked on the mailing list that we revert this for now as
it breaks write support.

Reported-by: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>

With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.c

Signed-off-by: Tom Rini <trini@ti.com>

arch/arm/cpu/armv7/omap-common/config.mk is never included
because "omap-common" is not SoC name.

If we want to add OMAP-specific compiler flags,
they must be added to omap3/config.mk, omap4/config.mk, omap5/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>

Same as the previous commit.
Move sanity check to prepare1 target to avoid nasty troubles.

Before this commit, LDSCRIPT existence was not checked
when it was specified by CONFIG_SYS_LDSCRIPT.
Now LDSCRIPT existence is checked for all boards.

$(wildcard $(LDSCRIPT)) must point to the linker scripts
with absolute path.
Otherwise, make will terminate with a false error
on out-of-tree build.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Before this commit, make terminated with an error
where is shouldn't under some condition.

This bug happened when we built a board unsupporting
generic board right after building with generic board.

For example, the following sequence failed.
(harmony uses generic board but microblaze-generic does not
support it)

  $ make harmony_config
  Configuring for harmony board...
  $ make CROSS_COMPILE=arm-linux-gnueabi-
    [ Build succeed ]
  $ make microblaze-generic_config
  Configuring for microblaze-generic board...
  $ make CROSS_COMPILE=microblaze-linux-
  Makefile:488: *** Your architecture does not support generic board.
  Please undefined CONFIG_SYS_GENERIC_BOARD in your board config file.  Stop.

We had to do "make clean" before building the microblaze board.

This commit fixes this unconvenience.

Move generic board sanity check to "prepare1" target,
which is run after generation of include/autoconf.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Commit 6ab6b2af deleted ./u-boot.dtb because it was a copy
of dts/dt.dtb.

But Simon suggested to keep u-boot.dtb at the top directory
because it is a build output.

After discussions, we agreed on revival of ./u-boot.dtb.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>