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Commit 87fb553b authored by Stephen Warren's avatar Stephen Warren Committed by Tom Warren
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ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124


Tegra124 moved the CSITE block's base address. Fix U-Boot to use
the correct address.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
parent f3026c16
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...@@ -34,7 +34,12 @@ ...@@ -34,7 +34,12 @@
#define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
#define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400)
#define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800)
#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
defined(CONFIG_TEGRA114)
#define NV_PA_CSITE_BASE 0x70040000 #define NV_PA_CSITE_BASE 0x70040000
#else
#define NV_PA_CSITE_BASE 0x70800000
#endif
#define TEGRA_USB_ADDR_MASK 0xFFFFC000 #define TEGRA_USB_ADDR_MASK 0xFFFFC000
#define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE #define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE
......
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