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  1. Nov 15, 2013
  2. Nov 13, 2013
    • Priyanka Jain's avatar
      powerpc/t104xrdb: Add T1042RDB_PI board support · 0d7ba2ea
      Priyanka Jain authored
      
      T1042RDB_PI is Freescale Reference Design Board supporting the T1042
      QorIQ Power Architecture™ processor. T1042 is a reduced personality
      of T1040 SoC without Integrated 8-port Gigabit. The board is designed
      with low power features targeted for Printing Image Market.
      
      T1042RDB_PI is  similar to T1040RDB board with few differences like
      it has video interface, supports T1042 personality
      
       T1042RDB_PI board Overview
       -----------------------
       - Four e5500 cores, each with a private 256 KB L2 cache
       - 256 KB shared L3 CoreNet platform cache (CPC)
       - Interconnect CoreNet platform
       - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
         support
       - Data Path Acceleration Architecture (DPAA) incorporating acceleration
       for the following functions:
          -  Packet parsing, classification, and distribution
          -  Queue management for scheduling, packet sequencing, and congestion
          	management
          -  Cryptography Acceleration
          - RegEx Pattern Matching Acceleration
          - IEEE Std 1588 support
          - Hardware buffer management for buffer allocation and deallocation
       - Ethernet interfaces
          - Two on-board RGMII 10/100/1G ethernet ports.
       - SERDES Connections, 8 lanes supporting:
            — PCI
            — SATA 2.0
       - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
         Interleaving
       -IFC/Local Bus
           - NAND flash: 1GB 8-bit NAND flash
           - NOR: 128MB 16-bit NOR Flash
       - Ethernet
           - Two on-board RGMII 10/100/1G ethernet ports.
           - PHY #0 remains powered up during deep-sleep
       - CPLD
       - Clocks
           - System and DDR clock (SYSCLK, “DDRCLK”)
           - SERDES clocks
       - Video
           - DIU supports video at up to 1280x1024x32bpp
           - HDMI connector
       - Power Supplies
       - USB
           - Supports two USB 2.0 ports with integrated PHYs
           - Two type A ports with 5V@1.5A per port.
       - SDHC
           - SDHC/SDXC connector
       - SPI
           - On-board 64MB SPI flash
       - I2C
           - Device connected: EEPROM, thermal monitor, VID controller, RTC
       - Other IO
          - Two Serial ports
          - ProfiBus port
          - Four I2C ports
      
      Signed-off-by: default avatarPoonam Aggrwal <poonam.aggrwal@freescale.com>
      Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
      Signed-off-by: default avatarPriyanka Jain <Priyanka.Jain@freescale.com>
      0d7ba2ea
    • Priyanka Jain's avatar
      powerpc/t104xrdb: Add T1040RDB board support · 062ef1a6
      Priyanka Jain authored
      
      T1040RDB is Freescale Reference Design Board supporting
      the T1040 QorIQ Power Architecture™ processor.
      
       T1040RDB board Overview
       -----------------------
       - Four e5500 cores, each with a private 256 KB L2 cache
       - 256 KB shared L3 CoreNet platform cache (CPC)
       - Interconnect CoreNet platform
       - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
         support
       - Data Path Acceleration Architecture (DPAA) incorporating acceleration
       for the following functions:
          -  Packet parsing, classification, and distribution
          -  Queue management for scheduling, packet sequencing, and congestion
             management
          -  Cryptography Acceleration
          - RegEx Pattern Matching Acceleration
          - IEEE Std 1588 support
          - Hardware buffer management for buffer allocation and deallocation
       - Ethernet interfaces
          - Integrated 8-port Gigabit Ethernet switch
          - Four 1 Gbps Ethernet controllers
       - SERDES Connections, 8 lanes supporting:
          - PCI
          - SGMII
          - QSGMII
          - SATA 2.0
       - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
         Interleaving
       -IFC/Local Bus
          - NAND flash: 1GB 8-bit NAND flash
          - NOR: 128MB 16-bit NOR Flash
       - Ethernet
          - Two on-board RGMII 10/100/1G ethernet ports.
          - PHY #0 remains powered up during deep-sleep
       - CPLD
       - Clocks
          - System and DDR clock (SYSCLK, “DDRCLK”)
          - SERDES clocks
       - Power Supplies
       - USB
          - Supports two USB 2.0 ports with integrated PHYs
          - Two type A ports with 5V@1.5A per port.
       - SDHC
          - SDHC/SDXC connector
       - SPI
          - On-board 64MB SPI flash
       - I2C
          - Devices connected: EEPROM, thermal monitor, VID controller
       - Other IO
          - Two Serial ports
          - ProfiBus port
      
      Signed-off-by: default avatarPoonam Aggrwal <poonam.aggrwal@freescale.com>
      Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
      Signed-off-by: default avatarPriyanka Jain <Priyanka.Jain@freescale.com>
      [York Sun: fixed Makefile]
      Acked-by: default avatarYork Sun <yorksun@freescale.com>
      062ef1a6
    • Shengzhou Liu's avatar
      powerpc/p1010rdb: update readme for p1010rdb-pa and p1010rdb-pb · 62af7615
      Shengzhou Liu authored
      
      - Remove duplicate doc/README.p1010rdb
      - Rename README to README.P1010RDB-PA
      - Add new README.P1010RDB-PB
      
      P1010RDB-PB is a variation of previous P1010RDB-PA board.
      
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      62af7615
    • Prabhakar Kushwaha's avatar
      powerpc/t1040: enable PBL tool for T1040 · 439fbe75
      Prabhakar Kushwaha authored
      
      Use a default RCW of protocol 0x66.
      A PBI configure file which uses CPC as 256KB SRAM. It can be used by
      PBL tool on T1040 to build a pbl boot image.
      
      Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
      439fbe75
    • Heiko Schocher's avatar
      i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework · 6789e84e
      Heiko Schocher authored
      - add omap24xx driver to new multibus/multiadpater support
      - adapted all config files, which uses this driver
      
      Tested on the am335x based siemens boards rut, dxr2 and pxm2
      posted here:
      http://patchwork.ozlabs.org/patch/263211/
      
      
      
      Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
      Tested-by: default avatarTom Rini <trini@ti.com>
      Cc: Lars Poeschel <poeschel@lemonage.de>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Cc: Thomas Weber <weber@corscience.de>
      Cc: Tom Rix <Tom.Rix@windriver.com>
      Cc: Grazvydas Ignotas <notasas@gmail.com>
      Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
      Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Ilya Yanok <yanok@emcraft.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Pali Rohár <pali.rohar@gmail.com>
      Cc: Peter Barada <peter.barada@logicpd.com>
      Cc: Nagendra T S  <nagendra@mistralsolutions.com>
      Cc: Michael Jones <michael.jones@matrix-vision.de>
      Cc: Raphael Assenat <raph@8d.com>
      Acked-by: default avatarIgor Grinberg <grinberg@compulab.co.il>
      Acked-by: default avatarStefano Babic <sbabic@denx.de>
      6789e84e
    • Nobuhiro Iwamatsu's avatar
      i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework · 2035d77d
      Nobuhiro Iwamatsu authored
      
      This updates to new I2C framwwork on sh_i2c.
      And this also updates boards(kzm9g and ecovec) that using sh_i2c.
      
      Signed-off-by: default avatarNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
      Signed-off-by: default avatarNobuhiro Iwamatsu <iwamatsu@nigauri.org>
      2035d77d
  3. Nov 12, 2013
  4. Nov 11, 2013
    • Wolfgang Denk's avatar
      MPC824x: remove obsolete "PN62" board · 649acfe1
      Wolfgang Denk authored
      
      The MPC824x processors have long reached EOL, and the PN62 board has
      not seen any board-specific updates for more than a decade.  It is now
      causing build issues.  Instead of wasting time on things nobody is
      interested in any more, we rather drop this board.
      
      Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
      Cc: Wolfgang Grandegger <wg@grandegger.com>
      cc: Tom Rini <trini@ti.com>
      649acfe1
  5. Nov 09, 2013
    • Paul Burton's avatar
      malta: add script & instructions to flash U-boot · 024fba54
      Paul Burton authored
      
      This patch adds a script which may be used with MIPS Navigator Console
      and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta
      development board.
      
      Please see the newly added doc/README.malta for usage instructions.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      024fba54
    • Paul Burton's avatar
      malta: setup PIIX4 interrupt route · 81f98bbd
      Paul Burton authored
      
      Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
      be left disabled. Linux does not set up this routing but relies upon it
      having been set up by the bootloader, reading back the IRQ lines which
      the PIRQ[A:D] signals have been routed to.
      
      This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
      This matches the setup used by YAMON.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      81f98bbd
    • Paul Burton's avatar
      malta: enable RTC support · 3ced12a0
      Paul Burton authored
      
      This is actually required in order for a Linux kernel to boot
      successfully on a physical Malta board. Without enabling the RTC, a
      Malta Linux kernel will get stuck in its estimate_frequencies function
      on boot.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      3ced12a0
    • Paul Burton's avatar
      malta: disable L2 caches · e174bd74
      Paul Burton authored
      
      Malta boards may be used with cores which support L2 caches, however
      U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll
      disable L2 caches by setting the L2B bit in Config2. This is specific to
      MTI/Imagination MIPS cores which is why this is done for the Malta board
      rather than generically.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      e174bd74
    • Paul Burton's avatar
      malta: display "U-boot" on the LCD screen · e0ada631
      Paul Burton authored
      
      Displaying a message on the LCD screen is a simple yet effective way to
      show the user that the board has booted successfully.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      e0ada631
    • Paul Burton's avatar
      malta: support for coreFPGA6 boards · baf37f06
      Paul Burton authored
      
      This patch adds support for running on Malta boards using coreFPGA6
      core cards, including support for the msc01 system controller used
      with them. The system controller is detected at runtime allowing one
      U-boot binary to run on a Malta with either.
      
      Due to the PCI I/O base differing between Maltas using gt64120 & msc01
      system controllers, the UART setup is modified slightly. A second UART
      is added so that there is one pointing at the correct address for each
      system controller. The Malta board then defines its own
      default_serial_console function to select the correct one at runtime.
      The incorrect UART will simply not function.
      
      Tested on:
        - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
          with and without an L2 cache.
        - QEMU.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      baf37f06
    • Paul Burton's avatar
      malta: setup super I/O UARTs · a257f626
      Paul Burton authored
      
      On a real Malta the Super I/O needs to be configured before we are able
      to access the UARTs. This patch performs that configuration, setting up
      the UARTs in the same way that YAMON would.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      a257f626
    • Paul Burton's avatar
      qemu-malta: rename to just "malta" · 7a9d109b
      Paul Burton authored
      
      This is in preparation for adapting this board to function correctly on
      a physical MIPS Malta board. The board is moved into an "imgtec" vendor
      directory at the same time in order to ready us for any other boards
      supported by Imagination in the future.
      
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      7a9d109b
  6. Nov 08, 2013
  7. Nov 06, 2013
  8. Nov 04, 2013
  9. Nov 01, 2013
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