- Nov 21, 2014
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Simon Glass authored
Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Before adding driver model support, split out a few of the functions so that they can be used by the driver model code. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Simon Glass authored
These boards all have the same GPIO arrangement, so add some common platform data that can be used by all boards. Remove the configs which are no longer required. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Modify this driver to support driver model, with platform data required to determine the GPIOs that it controls. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
This works correctly, so switch it over before the deadline. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
The value should be 0x21f00000. Fix it. Signed-off-by:
Simon Glass <sjg@chromium.org>
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- Nov 20, 2014
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git://git.denx.de/u-boot-ubiTom Rini authored
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git://git.denx.de/u-boot-i2cTom Rini authored
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git://git.denx.de/u-boot-mpc5xxxTom Rini authored
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- Nov 19, 2014
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Stefan Roese authored
When an MPC5200 based board is used with SPL support, the main U-Boot needs to clear the GD (global data) struct again. Otherwise the generic board init code in board_init_f (when CONFIG_SYS_GENERIC_BOARD is defined) will not initialize all GD variables correctly. Resulting in a hangup on the a4m2k board. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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Stefan Roese authored
a3m071 and a4m2k share one config header. So adding the generic board defines in this one file is enough to convert both boards. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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Dirk Eibach authored
The gdsys hrcon board is based on a Freescale MPC8308 SOC. It boots from NOR-Flash, kernel and rootfs are stored on SD-Card. On board peripherals include: - 1x GbE (optional) - Lattice ECP3 FPGA connected via eLBC and PCIe Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Wolfgang Denk found this issue using cppcheck: (error) Uninitialized variable: fpga_features Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Addressing was completely broken for cmd_fpgad. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
The device id makes u-boot think that this chip needs cfi_reverse_geometry(), which is not the case. Add it to jedec_flash, so it is handled properly. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Tune dlvision configuration similar to other gdsys boards to reduce memory footprint. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Andrew Ruder authored
The UBI layer will disable much of its error reporting when it is compiled into the linux kernel to avoid stopping boot. We want this error reporting in U-Boot since we don't initialize the UBI layer until it is used and want the error reporting. We force this by telling the UBI layer we are building as a module. Signed-off-by:
Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Kyungmin Park <kmpark@infradead.org>
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Heiko Schocher authored
ff94bc40 "mtd, ubi, ubifs: resync with Linux-3.14" introduced the writebufsize field in struct mtd_info, which is not initialized in the cfi_flash driver, which leads in not working ubi on cfi flashes. Fix it Signed-off-by:
Heiko Schocher <hs@denx.de> Reported-by:
Andrew Ruder <andrew.ruder@elecsyscorp.com> Acked-by:
Stefan Roese <sr@denx.de> Acked-by:
Andrew Ruder <andrew.ruder@elecsyscorp.com>
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- Nov 17, 2014
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Bo Shen authored
The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display (optional, disabled by default) - Support ethernet - Support USB mass storage Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Bo Shen authored
The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display - Support ethernet - Support USB mass storage Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Bo Shen authored
The User Register in GMAC IP is used to select interface type. When with GE feature, it is used to select interface between RGMII and GMII. If without GE feature, it is used to select interface between MII and RMII. Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Josh Wu authored
As in SAMA5D4 SoC, the gf table in ROM code can not be seen. So, when we try to use PMECC, we need to build it when do initialization. Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it is defined we will build gf table runtime. The PMECC use the BCH algorithm, so based on the build_gf_tables() function in lib/bch.c, we can build the Galois Field lookup table. Signed-off-by:
Josh Wu <josh.wu@atmel.com> Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> [adopt Bo's change in spl.c] Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
device ready pin is signalling that the device is ready on state 1 not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Acked-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
erase one nand block in spl code. keep it simple, as size matters This is used on the upcoming taurus spl support. Signed-off-by:
Heiko Schocher <hs@denx.de> Acked-by:
Scott Wood <scottwood@freescale.com> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
using this driver in SPL code with CONFIG_SPL_NAND_ECC configured leads in an compileerror. Fix this. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by:
Bo Shen <voice.shen@atmel.com> [fix subject] Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
enable to boot only a raw u-boot.bin image from nand with the CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on boards where spl space is low. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
- compile mpddrc ram init code also for AT91SAM9M10G45 based boards. - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
use the configure value for computing the ba_off value not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Bo Shen <voice.shen@atmel.com> Reviewed-by:
Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h and define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value). Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Heiko Schocher authored
generate the boot.bin file for all atmel SoC (arm920, arm926, armv7) Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> [fix subject] Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Bo Shen authored
The clock source for master clock can be slow clock, main clock, plla clock or upll clock. So, make the clock source selection field in mckr can be configured. Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Bo Shen authored
We need to make sure the main clock ready field in MCFR is set after switch to main crystal oscillator. Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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