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Commit f7cf291a authored by Samuel Mescoff's avatar Samuel Mescoff Committed by Andreas Bießmann
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ARM: at91: sama5d2: configure the L2 cache memory


The SAMA5D2 has a second internal SRAM that can be reassigned as a L2
cache memory.
Make sure it is configured as a L2 cache memory when booting from a SPL
image.

Based on the commit b5ea95ef2b5b from the at91bootstrap repository.

Signed-off-by: default avatarSamuel Mescoff <samuel.mescoff@mobile-devices.fr>
Reviewed-by: default avatarWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: default avatarAndreas Bießmann <andreas.devel@googlemail.com>
parent c21c28b6
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