From 87fb553b90ab191fd643afa64d0fafd266a808c5 Mon Sep 17 00:00:00 2001 From: Stephen Warren <swarren@nvidia.com> Date: Mon, 3 Feb 2014 14:03:26 -0700 Subject: [PATCH] ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124 Tegra124 moved the CSITE block's base address. Fix U-Boot to use the correct address. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> --- arch/arm/include/asm/arch-tegra/tegra.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index 5fe19ae1ac1..d63af0e5fd9 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -34,7 +34,12 @@ #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ + defined(CONFIG_TEGRA114) #define NV_PA_CSITE_BASE 0x70040000 +#else +#define NV_PA_CSITE_BASE 0x70800000 +#endif #define TEGRA_USB_ADDR_MASK 0xFFFFC000 #define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE -- GitLab