med: initial addition, Boundary Devices board

med.h: CONFIG_IPUV3_CLK 264000000
med: add CONFIG_CMD_GPIO
med: explicit fbp_detect_i2c
med: use boundary.h
med: add CONFIG_SPI_FLASH_SPANSION
med: med_defconfig add CONFIG_BLOCK_CACHE
med: use common code for eth init
med: eth.c now in common directory
med: move misc_init_r/do_kbd to common
med: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common
med: add  CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs
med: add med_q1g.cfg
med: port to v2018.07

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

med: update to v2017.01
med: update to v2017.03

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>

arch/arm/mach-imx/mx6/Kconfig

@@ -434,6 +434,9 @@ config TARGET_LTCH
 config TARGET_MCS
 	bool "mcs"
 
+config TARGET_MED
+	bool "med"
+
 config TARGET_NITROGEN6X
 	bool "nitrogen6x"
 	imply USB_HOST_ETHER
@@ -601,6 +604,7 @@ source "board/boundary/ls/Kconfig"
 source "board/boundary/lshore/Kconfig"
 source "board/boundary/ltch/Kconfig"
 source "board/boundary/mcs/Kconfig"
+source "board/boundary/med/Kconfig"
 source "board/boundary/nitrogen6x/Kconfig"
 source "board/boundary/ys/Kconfig"
 source "board/bticino/mamoj/Kconfig"

board/boundary/med/6x_bootscript-yocto.txt

+# Yocto-specifics
+setenv bootpart 2
+setenv bootdir /
+
+if ${fs}load mmc ${disk}:1 10008000 logo.bmp.gz ; then
+	bmp d 10008000
+fi
+
+setenv bootargs enable_wait_mode=off
+
+setenv i2cres rtcerr
+if i2c dev 2 ; then
+	if i2c read 0x6f 0.1 6 0x10004000 ; then
+		mw.b 10004006 0 6
+		if cmp.b 10004000 10004006 6 ; then
+			echo "RTC not programmed" ;
+			if i2c mw 0x6f 7.1 0x90 ; then
+				if i2c mw 0x6f 0.1 0x04 6 ; then
+					echo "Initialized RTC" ;
+					setenv i2cres rtcinit ;
+				else
+					setenv i2cres rtcerr-fill
+				fi
+			else
+				setenv i2cres rtcerr-wrinit
+			fi
+		else
+			echo "non-blank RTC data";
+			setenv i2cres rtcok ;
+		fi
+	else
+		setenv i2cres rtcerr-read
+	fi
+else
+	setenv i2cres rtcerr-dev
+fi
+setenv bootargs $bootargs $i2cres
+setenv i2cres
+
+setenv nextcon 0;
+setenv bootargs $bootargs video=mxcfb0:dev=lcd,LB043,if=RGB24
+setenv bootargs $bootargs ft5x06_ts.screenres=800,1280
+# rotate touch coordinates 90 degrees clockwise
+setenv bootargs $bootargs ft5x06_ts.calibration=0,-40928,31391744,40941,0,0,65536
+setenv bootargs $bootargs g_ether.dev_addr=55:aa:55:aa:55:aa
+setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off
+setenv fbmem 28M
+setenv nextcon 1
+
+i2c dev 1 ;
+if i2c probe 0x50 ; then
+	setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off
+	setenv fbmem $fbmem,28M
+	setexpr nextcon $nextcon + 1
+else
+	echo "------ no HDMI monitor";
+fi
+
+while test "4" -ne $nextcon ; do
+	setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
+	setexpr nextcon $nextcon + 1 ;
+done
+
+setenv bootargs $bootargs $fbmem
+setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait"
+
+if itest.s x$bootpart == x ; then
+	bootpart=1
+fi
+
+if test "sata" = "${dtype}" ; then
+	setenv bootargs "$bootargs root=/dev/sda$bootpart" ;
+else
+	setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ;
+fi
+
+dtbname="imx6";
+if itest.s x6S != "x$cpu" ; then
+	dtbname=${dtbname}q-;
+else
+	dtbname=${dtbname}s-;
+fi
+
+if itest.s x == "x$board" ; then
+	board=sabrelite
+fi
+dtbname=${dtbname}${board}.dtb;
+
+if itest.s x == x${bootdir} ; then
+	bootdir=/boot/
+fi
+
+if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then
+	havedtb=1;
+	setenv fdt_addr 0x11000000
+	setenv fdt_high 0xffffffff
+else
+	havedtb=
+fi
+
+if itest.s x == x$allow_noncea ; then
+	setenv bootargs $bootargs mxc_hdmi.only_cea=1;
+	echo "only CEA modes allowed on HDMI port";
+else
+        setenv bootargs $bootargs mxc_hdmi.only_cea=0;
+        echo "non-CEA modes allowed on HDMI, audio may be affected";
+fi
+
+if kbd ; then
+	if itest.s xD == x$keybd ; then
+		if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then
+			if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then
+			   if itest.s x$havedtb == x ; then
+					bootm 10800000 12800000 ;
+			   else
+					bootm 10800000 12800000 12000000 ;
+			   fi
+			fi
+		fi
+	fi
+fi
+
+if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then
+	if itest.s x$havedtb == x ; then
+		bootm 10800000 ;
+	else
+		bootm 10800000 - 12000000
+	fi
+fi
+echo "Error loading kernel image"

board/boundary/med/6x_bootscript.txt

+if ${fs}load mmc ${disk}:1 10008000 logo.bmp.gz ; then
+	bmp d 10008000
+fi
+
+setenv bootargs enable_wait_mode=off
+
+setenv i2cres rtcerr
+if i2c dev 2 ; then
+	if i2c read 0x6f 0.1 6 0x10004000 ; then
+		mw.b 10004006 0 6
+		if cmp.b 10004000 10004006 6 ; then
+			echo "RTC not programmed" ;
+			if i2c mw 0x6f 7.1 0x90 ; then
+				if i2c mw 0x6f 0.1 0x04 6 ; then
+					echo "Initialized RTC" ;
+					setenv i2cres rtcinit ;
+				else
+					setenv i2cres rtcerr-fill
+				fi
+			else
+				setenv i2cres rtcerr-wrinit
+			fi
+		else
+			echo "non-blank RTC data";
+			setenv i2cres rtcok ;
+		fi
+	else
+		setenv i2cres rtcerr-read
+	fi
+else
+	setenv i2cres rtcerr-dev
+fi
+setenv bootargs $bootargs $i2cres
+setenv i2cres
+
+setenv nextcon 0;
+setenv bootargs $bootargs video=mxcfb0:dev=lcd,LB043,if=RGB24
+setenv bootargs $bootargs ft5x06_ts.screenres=800,1280
+# rotate touch coordinates 90 degrees clockwise
+setenv bootargs $bootargs ft5x06_ts.calibration=0,-40928,31391744,40941,0,0,65536
+setenv bootargs $bootargs g_ether.dev_addr=55:aa:55:aa:55:aa
+setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off
+setenv fbmem 28M
+setenv nextcon 1
+
+i2c dev 1 ;
+if i2c probe 0x50 ; then
+	setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off
+	setenv fbmem $fbmem,28M
+	setexpr nextcon $nextcon + 1
+else
+	echo "------ no HDMI monitor";
+fi
+
+while test "4" -ne $nextcon ; do
+	setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
+	setexpr nextcon $nextcon + 1 ;
+done
+
+setenv bootargs $bootargs $fbmem
+setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait"
+
+if itest.s x$bootpart == x ; then
+	bootpart=1
+fi
+
+if test "sata" = "${dtype}" ; then
+	setenv bootargs "$bootargs root=/dev/sda$bootpart" ;
+else
+	setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ;
+fi
+
+dtbname="imx6";
+if itest.s x6S != "x$cpu" ; then
+	dtbname=${dtbname}q-;
+else
+	dtbname=${dtbname}s-;
+fi
+
+if itest.s x == "x$board" ; then
+	board=sabrelite
+fi
+dtbname=${dtbname}${board}.dtb;
+
+if itest.s x == x${bootdir} ; then
+	bootdir=/boot/
+fi
+
+if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then
+	havedtb=1;
+	setenv fdt_addr 0x11000000
+	setenv fdt_high 0xffffffff
+else
+	havedtb=
+fi
+
+if itest.s x == x$allow_noncea ; then
+	setenv bootargs $bootargs mxc_hdmi.only_cea=1;
+	echo "only CEA modes allowed on HDMI port";
+else
+        setenv bootargs $bootargs mxc_hdmi.only_cea=0;
+        echo "non-CEA modes allowed on HDMI, audio may be affected";
+fi
+
+if kbd ; then
+	if itest.s xD == x$keybd ; then
+		if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then
+			if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then
+			   if itest.s x$havedtb == x ; then
+					bootm 10800000 12800000 ;
+			   else
+					bootm 10800000 12800000 12000000 ;
+			   fi
+			fi
+		fi
+	fi
+fi
+
+if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then
+	if itest.s x$havedtb == x ; then
+		bootm 10800000 ;
+	else
+		bootm 10800000 - 12000000
+	fi
+fi
+echo "Error loading kernel image"

board/boundary/med/Kconfig

+if TARGET_MED
+
+config SYS_CPU
+	default "armv7"
+
+config SYS_BOARD
+	default "med"
+
+config SYS_VENDOR
+	default "boundary"
+
+config SYS_SOC
+	default "mx6"
+
+config SYS_CONFIG_NAME
+	default "med"
+
+source "board/boundary/common/Kconfig"
+
+endif

board/boundary/med/MAINTAINERS

+MED BOARD
+M:	Troy Kisky <troy.kisky@boundarydevices.com>
+S:	Maintained
+F:	board/boundary/med/
+F:	include/configs/med.h
+F:	configs/med_defconfig

board/boundary/med/Makefile

+#
+# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
+# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
+# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y  := med.o

board/boundary/med/med.c

+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/sys_proto.h>
+#include <malloc.h>
+#include <asm/arch/mx6-pins.h>
+#include <linux/errno.h>
+#include <asm/gpio.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/fbpanel.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/mach-imx/spi.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+#include <linux/fb.h>
+#include <ipu_pixfmt.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/mxc_hdmi.h>
+#include <i2c.h>
+#include <spi.h>
+#include <input.h>
+#include <usb/ehci-ci.h>
+#include "../common/bd_common.h"
+#include "../common/padctrl.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define I2C_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
+	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define SPI_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_SPEED_MED |	\
+	PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
+
+#define UART_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
+	PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define USDHC_PAD_CTRL	(PAD_CTL_PUS_47K_UP |			\
+	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm |			\
+	PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define USDHC4_PAD_CTRL	(PAD_CTL_PUS_47K_UP |			\
+	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm |			\
+	PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+/*
+ *
+ */
+static const iomux_v3_cfg_t init_pads[] = {
+	/* ECSPI1 */
+	IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
+#define GP_ECSPI1_NOR_CS	IMX_GPIO_NR(3, 19)
+	IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP),
+
+	/* ENET pads that don't change for PHY reset */
+	IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, PAD_CTRL_ENET_MDIO),
+	IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, PAD_CTRL_ENET_MDC),
+	IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, PAD_CTRL_ENET_TX),
+	/* pin 42 PHY nRST */
+#define GP_RGMII_PHY_RESET	IMX_GPIO_NR(1, 27)
+	IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, WEAK_PULLUP),
+
+	/* GPIO_KEYS */
+#define GP_S2	IMX_GPIO_NR(3, 3)
+	IOMUX_PAD_CTRL(EIM_DA3__GPIO3_IO03, WEAK_PULLUP),	/* S2 */
+#define GP_S4	IMX_GPIO_NR(3, 4)
+	IOMUX_PAD_CTRL(EIM_DA4__GPIO3_IO04, WEAK_PULLUP),	/* S4 */
+#define GP_S3	IMX_GPIO_NR(3, 5)
+	IOMUX_PAD_CTRL(EIM_DA5__GPIO3_IO05, WEAK_PULLUP),	/* S3 */
+
+	/* Misc inputs */
+	IOMUX_PAD_CTRL(GPIO_18__GPIO7_IO13, WEAK_PULLUP),	/* bidirectional - NXP P0-8 */
+	IOMUX_PAD_CTRL(NANDF_WP_B__GPIO6_IO09, WEAK_PULLUP),	/* bidirectional - NXP P0-14 */
+	IOMUX_PAD_CTRL(KEY_COL2__GPIO4_IO10, WEAK_PULLUP),	/* bidirectional - NXP P0-21 */
+	IOMUX_PAD_CTRL(KEY_ROW2__GPIO4_IO11, WEAK_PULLUP),	/* bidirectional - NXP P0-21 */
+	IOMUX_PAD_CTRL(CSI0_DATA_EN__GPIO5_IO20, WEAK_PULLUP),	/* bidirectional - NXP P2-10 */
+	IOMUX_PAD_CTRL(SD1_DAT1__GPIO1_IO17, WEAK_PULLUP),	/* bidirectional - NXP RST_OUT */
+	/* Misc outputs */
+	IOMUX_PAD_CTRL(EIM_DA0__GPIO3_IO00, WEAK_PULLUP),	/* TPS3823 - reset generator for NXP active hi */
+	IOMUX_PAD_CTRL(EIM_DA1__GPIO3_IO01, WEAK_PULLUP),	/* output - to NXP P4-30 */
+	IOMUX_PAD_CTRL(EIM_DA2__GPIO3_IO02, WEAK_PULLUP),	/* 74LVC1G32 - WDT active low - reset to I.MX */
+	IOMUX_PAD_CTRL(EIM_OE__GPIO2_IO25, WEAK_PULLUP), 	/* output - to NXP P4-31 */
+	IOMUX_PAD_CTRL(EIM_D20__GPIO3_IO20, WEAK_PULLUP),	/* output - to NXP P1-10 */
+
+	/* Backlight on LVDS connector */
+#define GP_BACKLIGHT_LVDS IMX_GPIO_NR(1, 18)
+	IOMUX_PAD_CTRL(SD1_CMD__GPIO1_IO18, WEAK_PULLUP),
+
+	/* UART1 */
+	/* UART2 */
+	IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL),
+
+	/* USDHC3 - sdcard */
+	IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT4__SD3_DATA4, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT5__SD3_DATA5, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT6__SD3_DATA6, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT7__SD3_DATA7, USDHC_PAD_CTRL),
+
+	/* USDHC4 - sdcard */
+	IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC4_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC4_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC4_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC4_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC4_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC4_PAD_CTRL),
+#define GP_USDHC4_CD		IMX_GPIO_NR(2, 6)
+	IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP), /* CD */
+};
+
+static const struct i2c_pads_info i2c_pads[] = {
+	/* I2C1, SGTL5000, J15:pins 5-6 */
+	I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL),
+	/* I2C2, HDMI EDID, RTC */
+	I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL),
+	/* I2C3,  Touch screen, FDC6301 */
+	I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL),
+};
+#define I2C_BUS_CNT	3
+
+int board_ehci_hcd_init(int port)
+{
+	return 0;
+}
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg board_usdhc_cfg[] = {
+	{.esdhc_base = USDHC4_BASE_ADDR, .bus_width = 4,
+			.gp_cd = GP_USDHC4_CD},
+	{.esdhc_base = USDHC3_BASE_ADDR, .bus_width = 8,},
+};
+#endif
+
+int board_spi_cs_gpio(unsigned bus, unsigned cs)
+{
+	return (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1;
+}
+
+void board_enable_lvds(const struct display_info_t *di, int enable)
+{
+	gpio_direction_output(GP_BACKLIGHT_LVDS, enable);
+}
+
+static const struct display_info_t displays[] = {
+	VD_WXGA_J(LVDS, NULL, 0, 0x00),
+
+	/* hdmi */
+	VD_1280_720M_60(HDMI, fbp_detect_i2c, 1, 0x50),
+	VD_1920_1080M_60(HDMI, NULL, 1, 0x50),
+	VD_1024_768M_60(HDMI, NULL, 1, 0x50),
+};
+#define display_cnt	ARRAY_SIZE(displays)
+
+static const unsigned short gpios_out_low[] = {
+	GP_RGMII_PHY_RESET,
+};
+
+static const unsigned short gpios_out_high[] = {
+	GP_ECSPI1_NOR_CS,
+};
+
+static const unsigned short gpios_in[] = {
+	GP_BACKLIGHT_LVDS,
+	GP_S2,
+	GP_S4,
+	GP_S3,
+};
+
+int board_early_init_f(void)
+{
+	set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in));
+	set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1);
+	set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0);
+	SETUP_IOMUX_PADS(init_pads);
+	return 0;
+}
+
+int board_init(void)
+{
+	common_board_init(i2c_pads, I2C_BUS_CNT, IOMUXC_GPR1_OTG_ID_GPIO1,
+			displays, display_cnt, 0);
+	return 0;
+}
+
+const struct button_key board_buttons[] = {
+	{"S2",	GP_S2,	'2', 1},
+	{"S4",	GP_S4,	'4', 1},
+	{"S3",	GP_S3,	'3', 1},
+	{NULL, 0, 0, 0},
+};
+
+#ifdef CONFIG_CMD_BMODE
+const struct boot_mode board_boot_modes[] = {
+	/* 4 bit bus width */
+	{"mmc0",	MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
+	{NULL,		0},
+};
+#endif

board/boundary/med/med_q1g.cfg

+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer doc/README.imximage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM      spi
+
+#define __ASSEMBLY__
+#include <config.h>
+#ifdef CONFIG_SECURE_BOOT
+CSF CONFIG_CSF_SIZE
+#endif
+#include "asm/arch/mx6-ddr.h"
+#include "asm/arch/iomux.h"
+#include "asm/arch/crm_regs.h"
+
+/* NC YET */
+#define MX6_MMDC_P0_MPDGCTRL0_VAL	0x42720306
+#define MX6_MMDC_P0_MPDGCTRL1_VAL	0x026F0266
+#define MX6_MMDC_P1_MPDGCTRL0_VAL	0x4273030A
+#define MX6_MMDC_P1_MPDGCTRL1_VAL	0x02740240
+#define MX6_MMDC_P0_MPRDDLCTL_VAL	0x45393B3E
+#define MX6_MMDC_P1_MPRDDLCTL_VAL	0x403A3747
+#define MX6_MMDC_P0_MPWRDLCTL_VAL	0x40434541
+#define MX6_MMDC_P1_MPWRDLCTL_VAL	0x473E4A3B
+#define MX6_MMDC_P0_MPWLDECTRL0_VAL	0x0011000E
+#define MX6_MMDC_P0_MPWLDECTRL1_VAL	0x000E001B
+#define MX6_MMDC_P1_MPWLDECTRL0_VAL	0x00190015
+#define MX6_MMDC_P1_MPWLDECTRL1_VAL	0x00070018
+#define WALAT	0
+
+#include "../common/mx6/ddr-setup.cfg"
+#define RANK 0
+#define BUS_WIDTH 64
+/* H5TC2G63FFR-PBA */
+/* MT41K128M16JT-125 IT:K */
+#include "../common/mx6/1066mhz_128mx16.cfg"
+#include "../common/mx6/clocks.cfg"

board/boundary/med/savesplash.txt

+if itest.s a$splashfile == a; then
+        splashfile=${board}.bmp.gz
+fi
+
+setenv stdout serial,vga
+if ${fs}load ${dtype} ${disk}:1 12000000 $splashfile ; then
+      echo "read $filesize bytes from SD card" ;
+      if sf probe ; then
+	   if sf read 0x12400000 $splashflash $filesize ; then
+	       if cmp.b 0x12000000 0x12400000 $filesize ; then
+		   echo "------- splash images match" ;
+                   if itest.s "x$filesize" != "x$splashsize" ; then
+                        echo "update splashsize" ;
+                        setenv splashsize $filesize;
+                        saveenv
+                   fi
+	       else
+		   echo "re-program splash image" ;
+		   sf erase $splashflash +0x$filesize ;
+		   sf write 0x12000000 $splashflash $filesize ;
+		   echo "verifying" ;
+		   if sf read 0x12400000 $splashflash $filesize ; then
+		       if cmp.b 0x12000000 0x12400000 $filesize ; then
+			   echo "Splash image upgraded.";
+                           setenv splashsize $filesize;
+                           saveenv
+		       else
+			   echo "Read verification error" ;
+		       fi
+		   else
+			echo "Error re-reading EEPROM" ;
+		   fi
+	       fi
+               if itest.s "$bmpsize" != "$filesize" ; then
+                   setenv bmpsize $filesize;
+                   saveenv;
+               fi
+	   else
+	       echo "Error reading splash image from EEPROM" ;
+	   fi
+      else
+	   echo "Error initializing EEPROM" ;
+      fi ;
+else
+     echo "No splash image $splashfile found on SD card" ;
+fi

configs/med_defconfig

+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TARGET_MED=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/med/med_q1g.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"med\""
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_FASTBOOT_BUF_SIZE=0x26000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_SPI=y
+CONFIG_MXC_SPI=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y

include/configs/med.h

+/*
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the Boundary Devices Nitrogen6X
+ * and Freescale i.MX6Q Sabre Lite boards.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "mx6_common.h"
+
+#define CONFIG_MACH_TYPE	3774
+
+#define CONFIG_MXC_SPI_DISPLAY
+
+#define CONFIG_FEC_MXC_PHYADDR		7
+#define CONFIG_IMX_HDMI
+#define CONFIG_PREBOOT	"if itest.s x != x$splashsize ; then " \
+				"sf probe && " \
+				"sf read $splashimage $splashflash $splashsize" \
+				" && bmp d $splashimage;" \
+			"fi"
+#define CONFIG_SYS_FSL_USDHC_NUM	2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define BD_I2C_MASK	7
+#define BD_MMC_UMS_DISKS "1"
+#define BD_SPLASH_FLASH "f0000"
+
+#include "boundary.h"
+#define CONFIG_EXTRA_ENV_SETTINGS BD_BOUNDARY_ENV_SETTINGS \
+	"netrecover=setenv ethact FEC; " \
+		"setenv bootargs console=ttymxc1,115200; " \
+		"dhcp 10800000 $serverip:uImage-${board}-recovery" \
+		"&& dhcp 12800000 $serverip:uramdisk-${board}-recovery.img " \
+		"&& bootm 10800000 12800000\0" \
+	"novideo=1\0" \
+	"savesplash=script=/savesplash; run runscript\0" \
+	"splashpos=m,m\0" \
+
+#endif	       /* __CONFIG_H */