mcs: initial addition, Boundary Devices board

mcs: wait for panel to sync up before enabling backlight
mcs: add display detection based on 4/5 wire touchscreen
mcs: mcssolo1g_64bit.cfg: new calibration values
mcs.h: CONFIG_IPUV3_CLK 264000000
mcs: setup_dispay is done in fbpanel
mcs: documentation fix, GP_LVDS_DE_15_4 is unused
mcs: add CONFIG_CMD_GPIO
mcs: remove redundant CONFIG_CMD_GPIO
mcs: explicit fbp_detect_i2c
mcs: pass fbp_detect_gpio
mcs: use VD_LD101WX1
mcs: verify port in board_ehci_hcd_init
mcs: use boundary.h
mcs: add CONFIG_SPI_FLASH_SPANSION
mcs: mcsquad_defconfig add CONFIG_BLOCK_CACHE
mcssolo1g_64bit: mcssolo1g_64bit_defconfig add CONFIG_BLOCK_CACHE
mcssolo: mcssolo_defconfig add CONFIG_BLOCK_CACHE
mcs: use common code for eth init
mcs: eth.c now in common directory
mcs: move misc_init_r/do_kbd to common
mcs: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common
mcs: use common 1066mhz_4x256mx16.cfg
mcs: add  CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs
mcs: use common 800mhz_4x128mx16.cfg
mcs: use common ddr scripts
mcs: port to v2018.07

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

mcs: add 6x_bootscript-ubuntu-3.14.txt

Signed-off-by: Laci Tele <laci@boundarydevices.com>

mcs: update to v2017.01
mcs: update to v2017.03

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>

arch/arm/mach-imx/mx6/Kconfig

@@ -431,6 +431,9 @@ config TARGET_LSHORE
 config TARGET_LTCH
 	bool "ltch"
 
+config TARGET_MCS
+	bool "mcs"
+
 config TARGET_NITROGEN6X
 	bool "nitrogen6x"
 	imply USB_HOST_ETHER
@@ -597,6 +600,7 @@ source "board/boundary/jlm/Kconfig"
 source "board/boundary/ls/Kconfig"
 source "board/boundary/lshore/Kconfig"
 source "board/boundary/ltch/Kconfig"
+source "board/boundary/mcs/Kconfig"
 source "board/boundary/nitrogen6x/Kconfig"
 source "board/boundary/ys/Kconfig"
 source "board/bticino/mamoj/Kconfig"

board/boundary/mcs/6x_bootscript-recovery.txt

+setenv stdout serial,vga;
+
+setenv bootargs enable_wait_mode=off console=ttymxc1,115200 consoleblank=0
+setenv bootargs $bootargs rootwait root=/dev/mmcblk0p1
+
+fivewire='';
+if gpio input 193 ; then ; else fivewire=1 ; fi
+if gpio input 130 ; then fivewire=1 ; fi
+
+if itest.s x == x$fivewire ; then
+        # pin 193 (GP7:1) is low - 4-wire screen
+        echo "------ Four wire screen" ;
+        setenv bootargs $bootargs ar1020_i2c.calibration=-20,-21308,85584968,13901,-11,-1120224,65536,1280,800
+        setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB666
+else
+        echo "------ Five wire screen" ;
+        setenv bootargs $bootargs ar1020_i2c.calibration=22737,-182,-4169360,5,-14290,54938792,65536,1280,800
+        setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB24
+fi
+
+setenv nextcon 1;
+while test "4" -ne $nextcon ; do
+        setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
+        setexpr nextcon $nextcon + 1 ;
+done
+
+if ${fs}load ${dtype} ${disk}:1 10800000 uImage-usbwrite ; then
+        if ${fs}load ${dtype} ${disk}:1 12800000 uramdisk-usbwrite.img ; then
+           if itest.s x$havedtb == x ; then
+                        bootm 10800000 12800000 ;
+           else
+                        bootm 10800000 12800000 12000000 ;
+           fi
+        else
+                echo "------ error loading ram-disk uramdisk-usbwrite.img";
+        fi
+else
+        echo "------ error loading kernel uImage-usbwrite";
+fi

board/boundary/mcs/6x_bootscript-ubuntu-3.14.txt

+setenv stdout serial,vga;
+setenv bootargs ''
+
+a_script=0x10800000
+a_zImage=0x10800000
+a_fdt=0x13000000
+a_ramdisk=0x13800000
+a_initrd=0x13a00000
+
+setenv initrd_high 0xffffffff
+if itest.s "x" == "x${dtbname}" ; then
+	if itest.s x6SOLO == "x${cpu}" ; then
+		dtbname=imx6dl-${board}.dtb;
+	elif itest.s x6DL == "x${cpu}" ; then
+		dtbname=imx6dl-${board}.dtb;
+	else
+		dtbname=imx6q-${board}.dtb;
+	fi
+fi
+
+
+if itest.s x${bootpart} == x ; then
+	bootpart=1
+fi
+
+if itest.s x${dtype} == x ; then
+	dtype=mmc
+fi
+
+if load ${dtype} ${disk}:${bootpart} ${a_script} uEnv.txt ; then
+    env import -t ${a_script} ${filesize}
+fi
+
+if itest.s x == x${bootdir} ; then
+	bootdir=/boot/
+fi
+
+if load ${dtype} ${disk}:${bootpart} ${a_fdt} ${bootdir}${dtbname} ; then
+	fdt addr ${a_fdt}
+	setenv fdt_high 0xffffffff
+else
+	echo "!!!! Error loading ${bootdir}${dtbname}";
+	exit;
+fi
+
+cmd_xxx_present=
+fdt resize
+if itest.s "x" != "x${cmd_custom}" ; then
+	run cmd_custom
+	cmd_xxx_present=1;
+fi
+
+setenv bootargs "${bootargs} enable_wait_mode=off console=${console},115200 consoleblank=0 rootwait fixrtc"
+
+fivewire='';
+if gpio input 193 ; then ; else fivewire=1 ; fi
+if gpio input 130 ; then ; else fivewire=1 ; fi
+
+if itest.s x == x$fivewire ; then
+        # pin 193 (GP7:1) is low - 4-wire screen
+        echo "------ Four wire screen" ;
+        setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB666
+        setenv bootargs $bootargs fbcon=rotate:2
+else
+        echo "------ Five wire screen" ;
+        setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB24
+fi
+setenv bootargs "${bootargs} ar1020_i2c.calibration=65536,0,0,0,65536,0,65536,4095,4095"
+
+setenv nextcon 1;
+while test "4" -ne $nextcon ; do
+        setenv bootargs "${bootargs} video=mxcfb${nextcon}:off"
+        setexpr nextcon $nextcon + 1 ;
+done
+
+if itest.s "x" != "x${cmd_lcd}" ; then
+	run cmd_lcd
+	cmd_xxx_present=1;
+fi
+if itest.s "x" != "x${cmd_lvds}" ; then
+	run cmd_lvds
+	cmd_xxx_present=1;
+fi
+if itest.s "x" != "x${cmd_lvds2}" ; then
+	run cmd_lvds2
+	cmd_xxx_present=1;
+fi
+
+if itest.s "x" == "x${cmd_xxx_present}" ; then
+	echo "!!!!!!!!!!!!!!!!"
+	echo "warning: your u-boot may be outdated, please upgrade"
+	echo "!!!!!!!!!!!!!!!!"
+fi
+
+
+if test "usb" = "${dtype}" ; then
+	setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
+else
+	setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bootpart}"
+fi
+
+if itest.s "yes" == "${dosplash}" ; then
+	setenv bootargs ${bootargs} splash quiet plymouth.ignore-serial-consoles
+fi
+
+if itest.s "x" != "x${overlayfs}" ; then
+	setenv bootargs ${bootargs} overlayfs=${overlayfs}
+	if itest.s "x" != "x${ofs-size}" ; then
+		setenv bootargs ${bootargs} ofs-size=${ofs-size}
+	fi
+fi
+
+if itest.s "x" != "x${cma}" ; then
+	setenv bootargs ${bootargs} cma=${cma}
+fi
+
+if itest.s "x" != "x${show_fdt}" ; then
+	fdt print /
+fi
+
+if itest.s "x" != "x${show_env}" ; then
+	printenv
+fi
+
+if kbd ; then
+        if itest.s xP == x${keybd} ; then
+                if ${fs}load ${dtype} ${disk}:${bootpart} ${a_zImage} ${bootdir}/uImage-usbwrite ; then
+                        if ${fs}load ${dtype} ${disk}:${bootpart} ${a_ramdisk} ${bootdir}/uramdisk-usbwrite.img ; then
+                           if itest.s x$havedtb == x ; then
+                                        bootm ${a_zImage} ${a_ramdisk} ;
+                           else
+                                        bootm ${a_zImage} ${a_initrd} ${a_fdt} ;
+                           fi
+                        fi
+                fi
+        fi
+fi
+
+echo "----------- trying to load /initrd.img";
+if load ${dtype} ${disk}:${bootpart} ${a_initrd} /initrd.img ; then
+	haverd=1;
+	setenv initrd_size ${filesize}
+else
+	haverd=
+fi
+
+echo 'Loading Linux...' ;
+if itest.s x${haverd} == x ; then
+	if load ${dtype} ${disk}:${bootpart} ${a_zImage} /vmlinuz ; then
+		bootz ${a_zImage} - ${a_fdt}
+	fi
+else
+	if load ${dtype} ${disk}:${bootpart} ${a_zImage} /vmlinuz ; then
+		bootz ${a_zImage} ${a_initrd}:${initrd_size} ${a_fdt} ;
+	fi
+fi
+echo "Error loading kernel image"

board/boundary/mcs/6x_bootscript.txt

+setenv stdout serial,vga;
+
+setenv bootargs enable_wait_mode=off console=ttymxc1,115200 consoleblank=0
+setenv bootargs $bootargs rootwait root=/dev/mmcblk0p1
+
+fivewire='';
+if gpio input 193 ; then ; else fivewire=1 ; fi
+if gpio input 130 ; then ; else fivewire=1 ; fi
+
+if itest.s x == x$fivewire ; then
+        # pin 193 (GP7:1) is low - 4-wire screen
+        echo "------ Four wire screen" ;
+        setenv bootargs $bootargs ar1020_i2c.calibration=-20808,53,84144280,-140,13747,-878712,65536,1280,800
+        setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB666
+else
+        echo "------ Five wire screen" ;
+        setenv bootargs $bootargs ar1020_i2c.calibration=22737,-182,-4169360,5,-14290,54938792,65536,1280,800
+        setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB24
+fi
+
+setenv nextcon 1;
+while test "4" -ne $nextcon ; do
+        setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
+        setexpr nextcon $nextcon + 1 ;
+done
+
+if kbd ; then
+        if itest.s xP == x$keybd ; then
+                if ${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage-usbwrite ; then
+                        if ${fs}load ${dtype} ${disk}:1 12800000 /boot/uramdisk-usbwrite.img ; then
+                           if itest.s x$havedtb == x ; then
+                                        bootm 10800000 12800000 ;
+                           else
+                                        bootm 10800000 12800000 12000000 ;
+                           fi
+                        fi
+                fi
+        fi
+fi
+
+setenv initrd_addr 0x12a00000
+setenv initrd_high 0xffffffff
+
+if ${fs}load mmc ${disk}:1 ${initrd_addr} /initrd.img ; then
+	haverd=1;
+	setenv initrd_size ${filesize}
+else
+	haverd=
+fi
+
+echo 'Loading Linux...' ;
+if ${fs}load mmc ${disk}:1 10800000 /vmlinuz ; then
+	bootz 10800000 ${initrd_addr}:${initrd_size}
+fi
+echo "Error loading kernel image"

board/boundary/mcs/Kconfig

+if TARGET_MCS
+
+config SYS_CPU
+	default "armv7"
+
+config SYS_BOARD
+	default "mcs"
+
+config SYS_VENDOR
+	default "boundary"
+
+config SYS_SOC
+	default "mx6"
+
+config SYS_CONFIG_NAME
+	default "mcs"
+
+source "board/boundary/common/Kconfig"
+
+endif

board/boundary/mcs/MAINTAINERS

+MCS BOARD
+M:	Troy Kisky <troy.kisky@boundarydevices.com>
+S:	Maintained
+F:	board/boundary/mcs/
+F:	include/configs/mcs.h
+F:	configs/mcsquad_defconfig
+F:	configs/mcssolo_defconfig
+

board/boundary/mcs/Makefile

+#
+# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
+# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
+# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y  := mcs.o

board/boundary/mcs/mcs.c

+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/sys_proto.h>
+#include <malloc.h>
+#include <asm/arch/mx6-pins.h>
+#include <linux/errno.h>
+#include <asm/gpio.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/fbpanel.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/mach-imx/spi.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+#include <linux/fb.h>
+#include <ipu_pixfmt.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/mxc_hdmi.h>
+#include <i2c.h>
+#include <input.h>
+#include <usb/ehci-ci.h>
+#include "../common/bd_common.h"
+#include "../common/padctrl.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
+	PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP |			\
+	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm |			\
+	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
+	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+static iomux_v3_cfg_t const init_pads[] = {
+	/* ECSPI1 pads */
+	IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
+#define GP_ECSPI1_NOR_CS		IMX_GPIO_NR(3, 19)
+	IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP),
+
+	/* ENET pads that don't change for PHY reset */
+	IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, PAD_CTRL_ENET_MDIO),
+	IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, PAD_CTRL_ENET_MDC),
+	IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, PAD_CTRL_ENET_TX),
+	IOMUX_PAD_CTRL(EIM_D23__GPIO3_IO23, WEAK_PULLUP),
+	/* pin 42 PHY nRST */
+#define GP_RGMII_PHY_RESET	IMX_GPIO_NR(1, 27)
+	IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, WEAK_PULLUP),
+#define GPIRQ_ENET_PHY		IMX_GPIO_NR(1, 28)
+	IOMUX_PAD_CTRL(ENET_TX_EN__GPIO1_IO28, WEAK_PULLUP),
+
+	/* GPIO_KEYS - Shutdown request on J55 */
+#define GP_GPIOKEY_POWER	IMX_GPIO_NR(4, 15)
+	IOMUX_PAD_CTRL(KEY_ROW4__GPIO4_IO15, WEAK_PULLUP),
+	/* J5 4-wire/5-wire select (4-wire is 0) */
+#define GP_4_5_WIRE_SELECT	IMX_GPIO_NR(5, 2)
+	IOMUX_PAD_CTRL(EIM_A25__GPIO5_IO02, WEAK_PULLDN),
+	/* SD3_DAT4 - jumpered 4-wire/5-wire select on first rev (4-wire was low) */
+#define GP_4_5_WIRE_SELECT_R1	IMX_GPIO_NR(7, 1)
+	IOMUX_PAD_CTRL(SD3_DAT4__GPIO7_IO01, WEAK_PULLDN),
+
+	/* HOGS - general gpios */
+	IOMUX_PAD_CTRL(EIM_A19__GPIO2_IO19, WEAK_PULLUP),	/* J54 pin 9 */
+	IOMUX_PAD_CTRL(EIM_A20__GPIO2_IO18, WEAK_PULLUP),	/* J54 pin 6 */
+	IOMUX_PAD_CTRL(EIM_A21__GPIO2_IO17, WEAK_PULLUP),	/* J54 pin 5 */
+	IOMUX_PAD_CTRL(EIM_A22__GPIO2_IO16, WEAK_PULLUP),	/* J54 pin 4 */
+	IOMUX_PAD_CTRL(EIM_A23__GPIO6_IO06, WEAK_PULLUP),	/* J54 pin 3 */
+	IOMUX_PAD_CTRL(EIM_A24__GPIO5_IO04, WEAK_PULLUP),	/* J54 pin 2 */
+
+	/* i2c1_rv4172 rtc */
+#define GPIRQ_RTC_RV4162	IMX_GPIO_NR(4, 7)
+	IOMUX_PAD_CTRL(KEY_ROW0__GPIO4_IO07, WEAK_PULLUP),
+
+	/* i2c3_ar1021 touch screen */
+#define GPIRQ_AR1021		IMX_GPIO_NR(1, 9)
+	IOMUX_PAD_CTRL(GPIO_9__GPIO1_IO09, WEAK_PULLUP),
+
+	/* PCIe */
+#define GP_PCIE_RESET		IMX_GPIO_NR(6, 31)
+	IOMUX_PAD_CTRL(EIM_BCLK__GPIO6_IO31, WEAK_PULLDN),
+
+	/* PWM4 on LVDS connector: J6 */
+#define GP_BACKLIGHT_LVDS	IMX_GPIO_NR(1, 18)
+	IOMUX_PAD_CTRL(SD1_CMD__GPIO1_IO18, WEAK_PULLDN),
+#define GP_LVDS_DE_15_4	IMX_GPIO_NR(4, 9)
+	IOMUX_PAD_CTRL(KEY_ROW1__GPIO4_IO09, WEAK_PULLUP),
+
+	/* reg_usbotg_vbus */
+#define GP_REG_USBOTG		IMX_GPIO_NR(3, 22)
+	IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN),	/* usbotg power */
+
+	/* UART1 */
+	IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL),
+
+	/* UART2 */
+	IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL),
+
+	/* UART3 */
+	IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL),
+#define GP_UART3_TX_EN		IMX_GPIO_NR(2, 26)
+	IOMUX_PAD_CTRL(EIM_RW__GPIO2_IO26, WEAK_PULLDN),
+
+	/* UART4 */
+	IOMUX_PAD_CTRL(CSI0_DAT12__UART4_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(CSI0_DAT13__UART4_RX_DATA, UART_PAD_CTRL),
+#define GP_UART4_TX_EN		IMX_GPIO_NR(2, 25)
+	IOMUX_PAD_CTRL(EIM_OE__GPIO2_IO25, WEAK_PULLDN),
+
+	/* UART5 */
+	IOMUX_PAD_CTRL(CSI0_DAT14__UART5_TX_DATA, UART_PAD_CTRL),
+	IOMUX_PAD_CTRL(CSI0_DAT15__UART5_RX_DATA, UART_PAD_CTRL),
+#define GP_UART5_TX_EN		IMX_GPIO_NR(2, 27)
+	IOMUX_PAD_CTRL(EIM_LBA__GPIO2_IO27, WEAK_PULLDN),
+
+	/* USB host */
+//	IOMUX_PAD_CTRL(EIM_D30__USB_H1_OC, WEAK_PULLUP),
+#define GP_USB_HUB_RESET	IMX_GPIO_NR(7, 12)
+	IOMUX_PAD_CTRL(GPIO_17__GPIO7_IO12, WEAK_PULLDN),
+
+	/* USBOTG */
+	IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP),
+	IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP),
+
+	/* USDHC2 */
+	IOMUX_PAD_CTRL(SD2_CLK__SD2_CLK, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD2_CMD__SD2_CMD, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL),
+#define GP_USDHC2_CD		IMX_GPIO_NR(7, 8)
+	IOMUX_PAD_CTRL(SD3_RST__GPIO7_IO08, WEAK_PULLUP),
+
+	/* USDHC3 */
+	IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL),
+#define GP_USDHC3_CD		IMX_GPIO_NR(7, 0)
+	IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP),
+
+	/* USDHC4 */
+	IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL),
+	IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL),
+#define GP_EMMC_RESET		IMX_GPIO_NR(2, 5)
+	IOMUX_PAD_CTRL(NANDF_D5__GPIO2_IO05, WEAK_PULLUP), /* RESET */
+};
+
+static const struct i2c_pads_info i2c_pads[] = {
+	/* I2C1, RV4162 RTC */
+	I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL),
+	/* I2C2 through TXS0108E buffer - external J54 pins 7(clock) and 8(data) */
+	I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL),
+	/* I2C3, AR1021 touch, external J4 (pin 30 clock, 32 data)  */
+	I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL),
+};
+#define I2C_BUS_CNT	3
+
+int board_ehci_power(int port, int on)
+{
+       if (port)
+               return 0;
+       gpio_set_value(GP_REG_USBOTG, on);
+       return 0;
+}
+
+int board_ehci_hcd_init(int port)
+{
+	if (port) {
+		/* Reset USB hub */
+		gpio_direction_output(GP_USB_HUB_RESET, 0);
+		mdelay(2);
+		gpio_set_value(GP_USB_HUB_RESET, 1);
+	}
+	return 0;
+}
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg board_usdhc_cfg[] = {
+	{.esdhc_base = USDHC3_BASE_ADDR, .bus_width = 4,
+			.gp_cd = GP_USDHC3_CD},
+	{.esdhc_base = USDHC2_BASE_ADDR, .bus_width = 4,
+			.gp_cd = GP_USDHC2_CD},
+	{.esdhc_base = USDHC4_BASE_ADDR, .bus_width = 8,
+			.gp_reset = GP_EMMC_RESET},
+};
+#endif
+
+int board_spi_cs_gpio(unsigned bus, unsigned cs)
+{
+	return (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1;
+}
+
+void board_enable_lvds(const struct display_info_t *di, int enable)
+{
+	if (enable)
+		mdelay(100);	/* let panel sync up before enabling backlight */
+	gpio_direction_output(GP_BACKLIGHT_LVDS, enable);
+}
+
+int fbp_detect_gpio(struct display_info_t const *di)
+{
+	int val;
+
+	val = gpio_get_value(GP_4_5_WIRE_SELECT);
+	if (val)
+		return 1;	/* 5 wire */
+	val = gpio_get_value(GP_4_5_WIRE_SELECT_R1);
+	return val;
+}
+
+static const struct display_info_t displays[] = {
+	VD_HANNSTAR7(LVDS, NULL, 0, 0x38),
+	/* has 5 - wire touchscreen */
+	VD_LD101WX1(LVDS, fbp_detect_gpio, 0, 0x00),
+};
+#define display_cnt	ARRAY_SIZE(displays)
+
+static const unsigned short gpios_out_low[] = {
+	GP_RGMII_PHY_RESET,
+	GP_UART3_TX_EN,
+	GP_UART4_TX_EN,
+	GP_UART5_TX_EN,
+	GP_BACKLIGHT_LVDS,
+	GP_EMMC_RESET,
+};
+
+static const unsigned short gpios_out_high[] = {
+	GP_ECSPI1_NOR_CS,	/* SS1 of spi nor */
+};
+
+static const unsigned short gpios_in[] = {
+	GP_4_5_WIRE_SELECT,
+	GP_4_5_WIRE_SELECT_R1,
+	GPIRQ_ENET_PHY,
+	GPIRQ_RTC_RV4162,
+	GPIRQ_AR1021,
+	GP_USDHC2_CD,
+	GP_USDHC3_CD,
+	GP_GPIOKEY_POWER,
+};
+
+int board_early_init_f(void)
+{
+	set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in));
+	set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1);
+	set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0);
+	SETUP_IOMUX_PADS(init_pads);
+	return 0;
+}
+
+int board_init(void)
+{
+	common_board_init(i2c_pads, I2C_BUS_CNT, IOMUXC_GPR1_OTG_ID_GPIO1,
+			displays, display_cnt, 0);
+	return 0;
+}
+
+const struct button_key board_buttons[] = {
+	{"power",	GP_GPIOKEY_POWER,	'P', 1},
+	{NULL, 0, 0, 0},
+};
+
+#ifdef CONFIG_CMD_BMODE
+const struct boot_mode board_boot_modes[] = {
+	/* 4 bit bus width */
+	{"mmc0",	MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+	{"mmc1",	MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
+	{NULL,		0},
+};
+#endif

board/boundary/mcs/mcsquad.cfg

+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM      spi
+
+#define __ASSEMBLY__
+#include <config.h>
+#include "asm/arch/mx6-ddr.h"
+#include "asm/arch/iomux.h"
+#include "asm/arch/crm_regs.h"
+
+/* NC YET */
+#define MX6_MMDC_P0_MPDGCTRL0_VAL	0x42740304
+#define MX6_MMDC_P0_MPDGCTRL1_VAL	0x026e0265
+#define MX6_MMDC_P1_MPDGCTRL0_VAL	0x02750306
+#define MX6_MMDC_P1_MPDGCTRL1_VAL	0x02720244
+#define MX6_MMDC_P0_MPRDDLCTL_VAL	0x463d4041
+#define MX6_MMDC_P1_MPRDDLCTL_VAL	0x42413c47
+#define MX6_MMDC_P0_MPWRDLCTL_VAL	0x37414441
+#define MX6_MMDC_P1_MPWRDLCTL_VAL	0x4633473b
+#define MX6_MMDC_P0_MPWLDECTRL0_VAL	0x0025001f
+#define MX6_MMDC_P0_MPWLDECTRL1_VAL	0x00290027
+#define MX6_MMDC_P1_MPWLDECTRL0_VAL	0x001f002b
+#define MX6_MMDC_P1_MPWLDECTRL1_VAL	0x000f0029
+#define WALAT	1
+
+#include "../common/mx6/ddr-setup.cfg"
+#define RANK 0
+#define BUS_WIDTH 64
+/* MT41K256M16HA-125:E */
+#include "../common/mx6/1066mhz_256mx16.cfg"
+#include "../common/mx6/clocks.cfg"

board/boundary/mcs/mcssolo.cfg

+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM      spi
+
+#define __ASSEMBLY__
+#include <config.h>
+#include "asm/arch/mx6-ddr.h"
+#include "asm/arch/iomux.h"
+#include "asm/arch/crm_regs.h"
+
+/* NC YET */
+#define MX6_MMDC_P0_MPDGCTRL0_VAL	0x42350231
+#define MX6_MMDC_P0_MPDGCTRL1_VAL	0x021A0218
+#define MX6_MMDC_P0_MPRDDLCTL_VAL	0x4B4B4E49
+#define MX6_MMDC_P0_MPWRDLCTL_VAL	0x3F3F3035
+#define MX6_MMDC_P0_MPWLDECTRL0_VAL	0x0040003C
+#define MX6_MMDC_P0_MPWLDECTRL1_VAL	0x0032003E
+#define WALAT	1
+
+#include "../common/mx6/ddr-setup.cfg"
+#define RANK 0
+#define BUS_WIDTH 32
+/* MT41K256M16HA-125:E */
+#include "../common/mx6/800mhz_256mx16.cfg"
+#include "../common/mx6/clocks.cfg"

board/boundary/mcs/mcssolo1g_64bit.cfg

+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM      spi
+
+#define __ASSEMBLY__
+#include <config.h>
+#include "asm/arch/mx6-ddr.h"
+#include "asm/arch/iomux.h"
+#include "asm/arch/crm_regs.h"
+
+/* 13 board sample */
+#define MX6_MMDC_P0_MPDGCTRL0_VAL	0x423f0240
+#define MX6_MMDC_P0_MPDGCTRL1_VAL	0x022e022c
+#define MX6_MMDC_P1_MPDGCTRL0_VAL	0x4221022e
+#define MX6_MMDC_P1_MPDGCTRL1_VAL	0x0215021b
+#define MX6_MMDC_P0_MPRDDLCTL_VAL	0x4a4c504d
+#define MX6_MMDC_P1_MPRDDLCTL_VAL	0x4d4e4f4b
+#define MX6_MMDC_P0_MPWRDLCTL_VAL	0x33342c32
+#define MX6_MMDC_P1_MPWRDLCTL_VAL	0x3333322c
+#define MX6_MMDC_P0_MPWLDECTRL0_VAL	0x00470048
+#define MX6_MMDC_P0_MPWLDECTRL1_VAL	0x003d0046
+#define MX6_MMDC_P1_MPWLDECTRL0_VAL	0x002d002f
+#define MX6_MMDC_P1_MPWLDECTRL1_VAL	0x002d0045
+#define WALAT	1
+
+#include "../common/mx6/ddr-setup.cfg"
+#define RANK 0
+#define BUS_WIDTH 64
+/* MT41K128M16JT-125 IT:K */
+#include "../common/mx6/800mhz_128mx16.cfg"
+#include "../common/mx6/clocks.cfg"

board/boundary/mcs/savesplash.txt

+if itest.s a$splashfile == a; then
+        splashfile=mcs.bmp.gz
+fi
+
+splashflashaddr=0xf0000;
+
+setenv stdout serial,vga
+if ${fs}load ${dtype} ${disk}:1 12000000 $splashfile ; then
+      echo "read $filesize bytes from SD card" ;
+      if sf probe ; then
+	   if sf read 0x12400000 $splashflashaddr $filesize ; then
+	       if cmp.b 0x12000000 0x12400000 $filesize ; then
+		   echo "------- splash images match" ;
+	       else
+		   echo "re-program splash image" ;
+		   sf erase $splashflashaddr +0x$filesize ;
+		   sf write 0x12000000 $splashflashaddr $filesize ;
+		   echo "verifying" ;
+		   if sf read 0x12400000 $splashflashaddr $filesize ; then
+		       if cmp.b 0x12000000 0x12400000 $filesize ; then
+			   echo "Splash image upgraded.";
+		       else
+			   echo "Read verification error" ;
+		       fi
+		   else
+			echo "Error re-reading EEPROM" ;
+		   fi
+	       fi
+               if itest.s "$bmpsize" != "$filesize" ; then
+                   setenv bmpsize $filesize;
+                   saveenv;
+               fi
+	   else
+	       echo "Error reading splash image from EEPROM" ;
+	   fi
+      else
+	   echo "Error initializing EEPROM" ;
+      fi ;
+else
+     echo "No splash image $splashfile found on SD card" ;
+fi

configs/mcsquad_defconfig

+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TARGET_MCS=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/mcs/mcsquad.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"mcsquad\""
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_FASTBOOT_BUF_SIZE=0x26000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_SPI=y
+CONFIG_MXC_SPI=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y

configs/mcssolo1g_64bit_defconfig

+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TARGET_MCS=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/mcs/mcssolo1g_64bit.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"mcssolo1g_64bit\""
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_FASTBOOT_BUF_SIZE=0x26000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_SPI=y
+CONFIG_MXC_SPI=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y

configs/mcssolo_defconfig

+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TARGET_MCS=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/mcs/mcssolo.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"mcssolo\""
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_FASTBOOT_BUF_SIZE=0x26000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_SPI=y
+CONFIG_MXC_SPI=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y

include/configs/mcs.h

+/*
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the Boundary Devices MCS board.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "mx6_common.h"
+
+#define CONFIG_MACH_TYPE	3769
+
+#define CONFIG_PREBOOT	"if itest.s  \"\" != \"$bmpsize\" ; then " \
+				"sf probe && " \
+				"sf read ${splashimage} ${splashflash} $bmpsize" \
+				" && bmp d 10008000;" \
+			"fi"
+#define CONFIG_SYS_FSL_USDHC_NUM	3
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define BD_I2C_MASK	7
+#define BD_SPLASH_FLASH "f0000"
+
+#include "boundary.h"
+#define CONFIG_EXTRA_ENV_SETTINGS BD_BOUNDARY_ENV_SETTINGS \
+	"disable_giga=1\0" \
+	"savesplash=script=/savesplash; run runscript\0" \
+
+#endif	       /* __CONFIG_H */