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ddr.c

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    • Lokesh Vutla's avatar
      d3daba10
      ARM: AM43xx: EPOS_EVM: Add support for LPDDR2 · d3daba10
      Lokesh Vutla authored
      
      AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
      Adding LPDDR2 init sequence and register details for the same.
      Below is the brief description of LPDDR2 init sequence:
      -> Configure VTP
      -> Configure DDR IO settings
      -> Disable initialization and refreshes until EMIF registers are programmed.
      -> Program Timing registers
      -> Program PHY control and Temp alert and ZQ config registers.
      -> Enable initialization and refreshes and configure SDRAM CONFIG register
      -> Wait till initialization is complete and the configure MR registers.
      
      Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
      d3daba10
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      ARM: AM43xx: EPOS_EVM: Add support for LPDDR2
      Lokesh Vutla authored
      
      AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
      Adding LPDDR2 init sequence and register details for the same.
      Below is the brief description of LPDDR2 init sequence:
      -> Configure VTP
      -> Configure DDR IO settings
      -> Disable initialization and refreshes until EMIF registers are programmed.
      -> Program Timing registers
      -> Program PHY control and Temp alert and ZQ config registers.
      -> Enable initialization and refreshes and configure SDRAM CONFIG register
      -> Wait till initialization is complete and the configure MR registers.
      
      Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>