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  • Peter Tyser's avatar
    a72dbae2
    fsl_pci_init: Make fsl_pci_init_port() PCI/PCIe aware · a72dbae2
    Peter Tyser authored
    
    Previously fsl_pci_init_port() always assumed that a port was a PCIe
    port and would incorrectly print messages for a PCI port such as the
    following on bootup:
        PCI1:  32 bit, 33 MHz, sync, host, arbiter
                    Scanning PCI bus 00
        PCIE1 on bus 00 - 00
    
    This change corrects the output of fsl_pci_init_port():
        PCI1:  32 bit, 33 MHz, sync, host, arbiter
                    Scanning PCI bus 00
        PCI1 on bus 00 - 00
    
    Signed-off-by: default avatarPeter Tyser <ptyser@xes-inc.com>
    a72dbae2
    History
    fsl_pci_init: Make fsl_pci_init_port() PCI/PCIe aware
    Peter Tyser authored
    
    Previously fsl_pci_init_port() always assumed that a port was a PCIe
    port and would incorrectly print messages for a PCI port such as the
    following on bootup:
        PCI1:  32 bit, 33 MHz, sync, host, arbiter
                    Scanning PCI bus 00
        PCIE1 on bus 00 - 00
    
    This change corrects the output of fsl_pci_init_port():
        PCI1:  32 bit, 33 MHz, sync, host, arbiter
                    Scanning PCI bus 00
        PCI1 on bus 00 - 00
    
    Signed-off-by: default avatarPeter Tyser <ptyser@xes-inc.com>