Forked from
Reform / reform-boundary-uboot
41837 commits behind the upstream repository.
-
Kumar Gala authored
The CoreNet style platforms can have a L3 cache that fronts the memory controllers. Enable that cache as well as add information into the device tree about it. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
Dave Liu <daveliu@freescale.com> Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by:
Roy Zang <tie-fei.zang@freescale.com> Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala authoredThe CoreNet style platforms can have a L3 cache that fronts the memory controllers. Enable that cache as well as add information into the device tree about it. Signed-off-by:
cpu_init.c 9.63 KiB