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reform-boundary-uboot

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    Kumar Gala authored
    The CoreNet style platforms can have a L3 cache that fronts the memory
    controllers.  Enable that cache as well as add information into the
    device tree about it.
    
    Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
    Signed-off-by: default avatarDave Liu <daveliu@freescale.com>
    Signed-off-by: default avatarBecky Bruce <beckyb@kernel.crashing.org>
    Signed-off-by: default avatarRoy Zang <tie-fei.zang@freescale.com>
    Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
    Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
    6aba33e9
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