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York Sun authored
Previous code presumes each DIMM has up to two rank (chip select). Newer DDR controller supports up to four chip select on one DIMM. Signed-off-by:York Sun <yorksun@freescale.com>
York Sun authoredPrevious code presumes each DIMM has up to two rank (chip select). Newer DDR controller supports up to four chip select on one DIMM. Signed-off-by:
fsl_ddr_sdram.h 6.51 KiB