powerpc/8xxx: Enable quad-rank DIMMs.
Previous code presumes each DIMM has up to two rank (chip select). Newer
DDR controller supports up to four chip select on one DIMM.
Signed-off-by:
York Sun <yorksun@freescale.com>
Showing
- arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c 38 additions, 14 deletionsarch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
- arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c 12 additions, 0 deletionsarch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
- arch/powerpc/cpu/mpc8xxx/ddr/options.c 10 additions, 7 deletionsarch/powerpc/cpu/mpc8xxx/ddr/options.c
- arch/powerpc/include/asm/fsl_ddr_sdram.h 1 addition, 0 deletionsarch/powerpc/include/asm/fsl_ddr_sdram.h
Loading
Please register or sign in to comment