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Lokesh Vutla authored
Given that DRA7/OMAP5 SoCs can support more than 2GB of memory, enable interleaving for this higher memory to increase performance. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
Lokesh Vutla authoredGiven that DRA7/OMAP5 SoCs can support more than 2GB of memory, enable interleaving for this higher memory to increase performance. Signed-off-by:
