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  1. Sep 01, 2021
  2. Aug 31, 2021
  3. Aug 30, 2021
    • Yoshimasa Niwa's avatar
      FIX: OrangeCrab Feather SPI pad name · fc78c964
      Yoshimasa Niwa authored
      **Problems**
      
      `SPIMaster` pad names are `clk`, `cs_n`, `mosi`, and `miso`.
      However, `feather_spi` is using `sck` instead of `clk`, therefore
      it is not able to use as-is for `SPIMaster`, for example,
      with `add_spi` on Linux On LiteX VexRiscv.
      
      **Solution**
      
      In fact, `spisdcard` and other SPI related pad names are
      using `clk`, only `feather_spi` is using `sck`.
      Therefore, rename `sck` to `clk`.
      fc78c964
  4. Aug 23, 2021
  5. Aug 17, 2021
    • Dan Callaghan's avatar
      lattice_crosslink_nx_evn: allow specifying the FPGA device · cc9e3928
      Dan Callaghan authored
      This board is documented as having the LIFCL-40-9BG400C part, but some
      versions of the board exist which were fitted with LIFCL-40-8BG400CES,
      an engineering sample part. The distinction is important because the
      engineering sample requires a different device ID to be embedded in the
      bitstream. If you try to build a bitstream for LIFCL-40-9BG400C and load
      it onto LIFCL-40-8BG400CES the configuration fails (indicated by the red
      "INITN" LED on this board).
      
      Accept --device to allow the user to specify which FPGA part their board
      has.
      cc9e3928
  6. Aug 16, 2021
  7. Aug 13, 2021
  8. Aug 11, 2021
  9. Aug 08, 2021
  10. Jul 30, 2021
  11. Jul 29, 2021
  12. Jul 28, 2021
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