icebreaker/fomu: Update flashing and disconnect reset from SoC (will need proper support in iCE40PLL).

boards: Add Vendor prefix to platforms/targets name when useful and when multiple boards from the same vendor. (With Retro-Compat on the imports).

fomu/icebreaker: Update Up5KSPRAM import (litex.soc.cores.up5kspram deprecated, still supported for now but triggers a compat notice).

Following commits make it generic/portable while still using IOBuffers:
https://github.com/litex-hub/valentyusb/commit/77b9d010586755a0e0c3b47d20aa387472d0ef7f
https://github.com/litex-hub/valentyusb/commit/371526e432a858b768ddc561cee0d7a0c8f40f42

This uniformizes Fomu target with others, provide a simple example of LiteX SoC
on Fomu and will ease maintenance.

We initially wanted to provide different level of support for the platforms/targets, mainly
to avoid too much maintenance and let each contributor update its contributed platforms and
targets, but it's easier to update all platforms/targets all-together when LiteX evolves or
changes (and that's what has been done on litex-boards since the creation of the repository).
So let just simplify things and avoid this differentiation.

Things weren't quite right for adding a CPU.  This fixes that by
correcting the placer arguments, memory map, and USB type.

Signed-off-by: Sean Cross <sean@xobs.io>

The SoCCore definition used to be available under litex.soc.integration,
however it was removed in
https://github.com/enjoy-digital/litex/commit/626533ce9d84ba081aa320dd330f5f0d800333b0



Signed-off-by: Sean Cross <sean@xobs.io>

This documentation can be fetched using a package such as lxsocdoc.

Signed-off-by: Sean Cross <sean@xobs.io>

The heap placer is important enough that we should just make it the
default.

Also, add a `USBSoC` that includes the required interrupt table, as this
must be specified prior to calling `__init__()`.

Signed-off-by: Sean Cross <sean@xobs.io>

Use the memory array to find the address for the sram bank.

Signed-off-by: Sean Cross <sean@xobs.io>

Allow the user to specify a CPU.

Signed-off-by: Sean Cross <sean@xobs.io>

This adds the Fomu target back in.  The default BaseSoC supports
various USB methods, and will be updated as more become available.

The debug bridge may optionally be added.

Signed-off-by: Sean Cross <sean@xobs.io>

The `fomu` target represents a generic target that supports the Fomu
48 MHz crystal, with or without a PLL.

It does not yet include a BaseSoC, since that requires USB and
up5kspram, neither of which are present yet.

Signed-off-by: Sean Cross <sean@xobs.io>