targets/digilent_arty: Add default value for CRG's with_mapped_flash.

Otherwise break retro-compat on external design importing CRG without passing this new parameter.

litex_boards/targets/digilent_arty.py

@@ -34,7 +34,7 @@ from litespi import LiteSPI
 # CRG ----------------------------------------------------------------------------------------------
 
 class _CRG(Module):
-    def __init__(self, platform, sys_clk_freq, with_mapped_flash):
+    def __init__(self, platform, sys_clk_freq, with_mapped_flash=False):
         self.rst = Signal()
         self.clock_domains.cd_sys       = ClockDomain()
         self.clock_domains.cd_sys4x     = ClockDomain(reset_less=True)