Skip to content
Snippets Groups Projects
Select Git revision
  • master default protected
  • stable
  • extraversion
  • early-display
  • variant-emmc-nvme-boot
  • 2024-07-19
  • 2024-06-30
  • 2023-10-18
  • 2023-10-10
  • 2023-07-04
  • 2023-01-25
  • v3
  • variant-emmc-nvme-boot
  • 2020-06-01
14 results

ddr

  • Clone with SSH
  • Clone with HTTPS
  • user avatar
    York Sun authored
    When the DDR controller is initialized below a junction temperature of
    0°C and then operated above a junction temperature of 65°C, the DDR
    controller may cause receive data errors, resulting ECC errors and/or
    corrupted data. This erratum applies to the following SoCs and their
    variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023,
    P2020.
    
    Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
    9855b3be
    History
    Name Last commit Last update
    ..
    fsl