CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH is defined in the socfpga_common.h,
but not referenced at all.  Remove.

Also, clean-up the README.socfpga.  CONFIG_MMC should not be defined
in the header since it was moved to Kconfig by commit c2726995
("mmc: complete unfinished move of CONFIG_MMC").  I see no grep hit
for the others.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>

Ther is no usage anywhere. It doesn't need to maintain this bit.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

The using the bitops is too easy controlling than now.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

callback function should be moved into sdhci_ops struct.
Other controller can use these ops for controlling clock or their own
specific register.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

To maintain consistency, set_ios type of legacy mmc_ops changed to int.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

This quirk doesn't need anymore.
It's replaced to get_cd callback function.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

Some SoCs can have their own card dect scheme.
Then they may use this get_cd callback function after implementing init
in their drivers.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

Since usb ether gadget have support for driver model, so enable
usb ether gadget.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Adopt usb ether gadget and rndis driver to adopt driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

The SPL load address changes based on boot type in HS devices,
ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs
for similar reasons. Add this same logic for AM33xx devices.

Also make the default value for ISW_ENTRY_ADDR correct for GP
devices based on SoC, HS devices already pick the correct
value in their defconfig.

Signed-off-by: Andrew F. Davis <afd@ti.com>

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>

Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing
usage in ls102xa and fsl-layerscape. Remove all powerpc macros in
config header and board header files.

Signed-off-by: York Sun <york.sun@nxp.com>

Use Kconfig to select errata workaround.

Signed-off-by: York Sun <york.sun@nxp.com>

Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate bk4r1]
Signed-off-by: Tom Rini <trini@konsulko.com>

Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <trini@konsulko.com>

Use TARGET_T2081QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>

Use TARGET_T2080RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>

Use TARGET_T2080QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>

Use TARGET_T1040QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>

Use TARGET_T1024RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Get missing hunk in board/freescale/t102xrdb/ddr.c]
Signed-off-by: Tom Rini <trini@konsulko.com>

Use TARGET_T1023RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>

Use Kconfig option to set little- or big-endian access to secure
boot and trust architecture.

Signed-off-by: York Sun <york.sun@nxp.com>

Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.

Signed-off-by: York Sun <york.sun@nxp.com>

Use Kconfig option for E500 and E500MC macros.

Signed-off-by: York Sun <york.sun@nxp.com>

According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface writes until the last word of an indirect transfer
otherwise indirect writes is known to fails sometimes. So, make sure
that QSPI indirect writes are 32 bit sized except for the last write. If
the txbuf is unaligned then use bounce buffer to avoid data aborts.

So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER
for all boards that use Cadence QSPI driver.

[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Now that the SPL is ready to be compiled in AArch64 and the DRAM
init code is ready, enable SPL support for the A64 SoC and in the
Pine64 defconfig.
For now we keep the boot0 header in the U-Boot proper, as this allows
to still use boot0 as an SPL replacement without hurting the SPL use
case.
We disable FEL support for now by making its compilation conditional
and disabling it for ARM64, as the code isn't ready yet.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

The UL() macro is pretty useful in sharing constants between assembly
and C files while still being able to specify a type for C.
Move the macro from an armv8 specific header into a common header file
to be able to use it by arm code (for instance) as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>

The predominantely 32-bit ARM targets try to compile the SPL in Thumb
mode to reduce code size.
The 64-bit AArch64 instruction set does not know an alternative, concise
encoding, so the Thumb build option should only be set for 32-bit
targets.
Likewise -marm machine options are only valid for ARMv7 targets.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Add FIT image booting from MMC device, during MMC bootcmd
u-boot env script look for bootscript, else fit image or else
finally look for legacy image uImage.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

- Add tab space
- remove exctra 'mmc dev ${mmcdev}'

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Enabling FIT along with Signature will make bootm to
not-understanding u-boot legacy image formats like uImage, etc.
So this patch enabling legacy image format for backward compatibility.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Enable Flattened Image Tree support for all Engicam boards.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Add config options for booting Linux from NAND in UBI format.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Create ubifs.img:
$ mkfs.ubifs -q -r /rootfs -m 4096 -e 253952 -c 7936 -o ubifs.img

Write ubifs.img:
---------------
icorem6qdl> nand erase.part rootfs
icorem6qdl> ubi part rootfs
icorem6qdl> ubi create rootfs

icorem6qdl> ext4load mmc 0:2 ${loadaddr} ubifs.img
166592512 bytes read in 8091 ms (19.6 MiB/s)
icorem6qdl> ubi write ${loadaddr} rootfs ${filesize}
166592512 bytes written to volume rootfs
icorem6qdl> ubifsmount ubi0:rootfs

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

gpmi-nand is the proper name used in nand driver from Linux for all
imx related nand boards, so rename mtdparts name as gpmi-nand instead
of nand, this will eventually reflects all nand info to Linux from
u-boot like mtdparts.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Boot Linux with uImage instead of zImage, so update
bootz with bootm.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Increase the nand kernel partition size, for supporting
large uImage files, maximum 8MiB.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Modify U-Boot default env settings.

Boot sequence:
1. SD card boot script
2. SD card boot no script
3. SATA boot script
4. SATA boot no script
5. eMMC boot script
6. eMMC boot no script

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>

Add MAC support.

Use PHY, connected to RGMII1 as a default Eth adapter,
by appropriate setting of 'cpsw_data.active_slave'.

'cpsw_phy' env variable can override this setting.

Set the MAC addresses in the U-Boot environment.
The addresses are retrieved from the on-board EEPROM or from the SOC's
MAC fuses.

Set the following PHYs RGMII clock delays:
- Enable RX delay
- Disable TX delay

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
[uri.mashiach@compulab.co.il: add RGMII clock delays]
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>