The filename of the auto-generated file is the same as the file that
includes it. Even though the form is in the generated/ subdirectory, this
could be confused.

Rename the generated file to something that makes it clear it is
auto-generated.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

At present dtoc has a very simplistic view of phandles. It assumes that
a property has only a single phandle with a single argument (i.e. two
cells per property).

This is not true in many cases. Enhance the implementation to scan all
phandles in a property and to use the correct number of arguments (which
can be 0, 1, 2 or more) when generating the C code. For the struct
definitions, use a struct which can hold the maximum number of arguments
used by the property.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

We want to support more than one phandle argument. It makes sense to use
an array for this rather than discrete struct members. Adjust the code to
support this. Rename the member to 'arg' instead of 'id'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

When writing values from properties which contain phandles, dtoc currently
writes 8 phandles per line. Change this to write one phandle per line.
This helps reduce line length, since phandles are generally longer and may
have arguments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

Update this function to return more detail about a property that contains
phandles. This will allow (in a future commit) more accurate handling of
these properties.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

This function will need to have access to class members once we enhance it
to support multiple phandle values. In preparation for that, move it into
the class.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

Now that the Fdt class can map phandles to the associated nodes, use that
instead of a separate implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

Add a map from phandles to nodes. This can be used by clients of the the
class instead of maintaining this themselves.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

At present dtoc assumes that all 'reg' properties have both an address and
a size. For I2C devices we do not have this. Adjust dtoc to cope.

Reported-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
does not since it ignores the #address-cells and #size-cells properties.

Update the tool to use fdt64_t as the element type for reg properties when
either the address or size is larger than one cell. Use the correct value
so that C code can obtain the information from the device tree easily.

Alos create a new type, fdt_val_t, which is defined to either fdt32_t or
fdt64_t depending on the word size of the machine. This type corresponds
to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types
since they are defined to phys_addr_t and phys_size_t which use
'unsigned long' in the 32-bit case, rather than 'unsigned int'.

Add tests for the four combinations of address and size values (32/32,
64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368
which now need to use the new fdt_val_t type.

Signed-off-by: Simon Glass <sjg@chromium.org>

Suggested-by: Heiko Stuebner <heiko@sntech.de>
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

Large arrays can result in lines with hundreds or thousands of characters
which is not very editor-friendly. To avoid this, addjust the tool to
group values 8 per line.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

When dealing with multi-cell values we need a type that can hold this
value. Add this and a function to process it from a list of cell values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

We need to be able to search back up the tree for #address-cells and
 #size-cells. Record the parent of each node to make this easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

Add upstream changes to U-Boot:

- new pylibfdt functions
- fdt_setprop_placeholder()

Signed-off-by: Simon Glass <sjg@chromium.org>

In a0f3e3df we switched to using the Ubuntu-provided dtc as travis
was having a problem with the number of warnings that were generated by
the newer dtc.  This is no longer a concern as we now have the same
logic as Linux to enable/disable additional more stringent warnings.  Go
back to building dtc from source.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on travis-ci:
Tested-by: Simon Glass <sjg@chromium.org>

To remove the assignment of CONFIG_SYS_EXTRA_OPTIONS option,
which is deprecated, use the CONFIG_XXXX_BOOT options to
indicate the boot media, and the SoC is selected by the board.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

Use the CONFIG_XXXX_BOOT to indicate the boot media, instead of
the CONFIG_SYS_USE_XXXX option, which is declared by
CONFIG_SYS_EXTRA_OPTIONS option.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

As said in READRE.kconfig, include/configs/*.h will be removed
after all options are switched to Kconfig. As the first step,
remove the follow line from include/configs/*.h.

 #include <asm/hardware.h>

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

To prepare to remove the SoCs options such as SAMA5D2, SAMA5D3
and SAMA5D4 from the CONFIG_SYS_EXTRA_OPTIONS option which is
deprecated, add the SoC options to Kconfig.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

Move the CONFIG_AT91FAMILY option from include/mach/<soc>.h header
file to Kconfig.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

The SAMA5D27-SiP (System in Package) integrates the SAMA5D2
with 1Gbit DDR2-SDRAM in a single package.

The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and
Mac-address EEPROM.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

The SAMA5D2 SiP(System in Package) has different Chip IDs in the
CHIPID and CHIP_EXID registers.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add missing defines of Multiport DDR-SDRAM Controller (MPDDRC).

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add the boot device for booting from the QSPI flash.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Because before switching to a lower clock source, we must switch
the clock source first instead of last. So before configuring the
PMC_MCKR register, invoke at91_mck_init_down() first.

As said in datasheet, the the size of SPL must not exceed the maximum
size allowed(64Kbytes).

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Refer to the commit 70f8c8316ad(PMC: add new mck function to lower
rate while switching) from AT91Bootstrap.

While switching to a lower clock source, we must switch the clock
source first instead of last. Otherwise, we could end up with
too high frequency on internal bus and peripherals.
This happens on SAMA5D2 as exitting from the ROM code.

Add a function pmc_mck_init_down() to allow this sequence.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

As said in 29.5.7 section of SAMA5D2 datasheet, before switching to
the crystal oscillator, a check must be carried out to ensure that
the oscillator is present and that its freqency is valid.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add a function to display the company's logo and board information
via the API from DM_VIDEO. This function can be shared by other
atmel boards, so locate it in board/atmel/common folder.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

In order to display the company's logo via the API of DM_VIDEO,
and add the logo files of both Atmel and Microchip.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

For sama5d2, add the sfr node with syscon support.

In order to access the SFR_UTMICKTRIM register for the utmi clock
driver, add the phandle property for the utmi node to point to the
sfr node.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.

The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.

The patch is cloned from the patch of mailing-list:
	[PATCH v2] clk: at91: utmi: set the mainck rate

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>

The SPL_CLK config should depend on SPL && SPL_DM.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

This section of the settings file may be missing. Handle that gracefully
rather than emitting an error.

Also update patman to write this section when a new settings file is
created.

Fixes: e11aa602 (patman: add support for omitting bouncing addresses)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chris Packham <judge.pckham@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

The e-mail addresses for DA8XXEVM BOARD and DA850_AM18XXEVM BOARD
are invalid.

Remove DA8XXEVM.

Update DA850_AM18XXEVM to have me be the maintainer since I work
for Logic PD and have access to OMAP-L138 and AM1808 EVM kits.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

This converts the following to Kconfig:
   CONFIG_EMIF4
   CONFIG_SDRC

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefano Babic <sbabic@denx.de>

This converts the following to Kconfig:
   CONFIG_MAC_ADDR_IN_SPIFLASH
   CONFIG_MAC_ADDR_IN_EEPROM

Signed-off-by: Adam Ford <aford173@gmail.com>

There was a check for CONFIG_MAC_ADDR_IN_EEPROM and
a check for CONFIG_MAC_ADDR_IN_SPIFLASH, however
some of the EEPROM related code wasn't encapsulated
inside the #if defined statement so the EEPROM code
could get executed even when it wasn't explicitly
enabled or wanted.

Signed-off-by: Adam Ford <aford173@gmail.com>

In mancy cases both CONFIG_ENV_OFFSET and CONFIG_ENV_ADDR point
to an otherwise-unused SMNAND_ENV_OFFSET.
This patch will set both CONFIG_ENV_OFFSET and CONFIG_ENV_ADDR to
whatever value was defined by SMNAND_ENV_OFFSET.

Signed-off-by: Adam Ford <aford173@gmail.com>