When a payload calls our memory allocator with the exact address hint, we
happily allocate memory from completely unpopulated regions. Payloads however
expect this to only succeed if they would be allocating from free conventional
memory.

This patch makes the logic behind those checks a bit more obvious and ensures
that we always allocate from known good free conventional memory regions if we
want to allocate ram.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>

We introduced special "DEBUG_EFI" defines when the efi loader
support was new. After giving it a bit of thought, turns out
we really didn't have to - the normal #define DEBUG infrastructure
works well enough for efi loader as well.

So this patch switches to the common debug() and #define DEBUG
way of printing debug information.

Signed-off-by: Alexander Graf <agraf@suse.de>

Some times you may want to exit an EFI payload again, for example
to default boot into a PXE installation and decide that you would
rather want to boot from the local disk instead.

This patch adds exit functionality to the EFI implementation, allowing
EFI payloads to exit.

Signed-off-by: Alexander Graf <agraf@suse.de>

To quit an EFI application we will need logic to jump to the caller
of a function without returning from the function we called into,
so we need setjmp/longjmp functionality.

This patch introduces a trivial implementation of these that I
verified works on armv7, thumb2 and aarch64.

Signed-off-by: Alexander Graf <agraf@suse.de>

There is new strider cpu flavor with DisplayPort video.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>

There is a new strider console flavor with DisplayPort
video.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>

Limit "osdsize"-command to access valid screens only.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>

There is a new "intempo" compression type that can
be reported on startup.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>

Signed-off-by: Peter Howard <phoward@gme.net.au>

Fixes:

=> ext2ls scsi 0:1
** Bad device scsi 0:1 **

for boards which use the scsi legacy driver (such as ls1043ardb).

Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

Modified:
	configs/ls1012afrdm_qspi_defconfig
	configs/ls1012aqds_qspi_defconfig
	configs/ls1012ardb_qspi_defconfig
	include/configs/ls1012afrdm.h
	include/configs/ls1012aqds.h
	include/configs/ls1012ardb.h

Signed-off-by: Tom Rini <trini@konsulko.com>

For boards which have more devices it is necessary to extend malloc
space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Nand and QSPI are not defined now but this will be extended.
Based on selected bootmode boot_targets are rewritten.
Patch also contains detection if variables are saved. If yes don't
rewrite boot_targets variable.

Also move variable setup to the end of file because SCSI needs to be
defined before others macros are using it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>

When the CONFIG_BOOTP_SERVERIP option is set, we ignore all
dhcp values for the tftp server and use our own serverip and
file name instead.

This is usually not what we want and I doubt it's set for a
good reason on ZynqMP. It definitely hurts if we want to support
uEFI PXE boot on it. So just remove the option for now.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Simplify zcu102 board file by moving CONFIG_AHCI enabling to common
file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Enable support for RAM based FIT images read by SPL.
Empty function for now to keep compiler happy.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Setup flag when default environment are used to be able to
rewrite default distro boot variables based on SoC boot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>

Fix boot.bin generation for Zynq and ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Marek Vasut <marex@denx.de>

0xc000 is not sufficient page table size if dc4 with 4 gems
is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zc1751-dc4 contains four GEMs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Add debug uart for zc1751-dc2.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Phys are available on zc1751-dc4 that's why enable them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Select MSR instructions via Kconfig instead of xparameters.h.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Toolchain can use some flags by default based on cpu version.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Remove autogenerated config.mk and select CPU options via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Simplify board file by enabling CMD_NAND via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Correct the nand ecc initialization code
This fixes the issue of incorrect nand ecc
init if no device is found in ecc_matrix then
it endsup ecc init with junk initialization
instead of the most suited one.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Repair typos in the previous "arm: lib: fix push/pop-section directives"
patch, which prevented VCMA9 board from building.

Signed-off-by: Marek Vasut <marex@denx.de>
Fixes: b2f18584 ("arm: lib: fix push/pop-section directives")
Cc: Tom Warren <twarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stephen Warren <swarren@nvidia.com>

When no DTB can be matched successfully to the board that's being used
a list of available FIT-embedded DTBs will be output to the console for
diagnostic purposes. But rather than the contents of the "description"
FDT property a non-existent property was accessed and as a result "NULL"
was output instead of the actual name(s) of the DTB(s). Fix this issue
by using the correct property which is also the exact same property
that's used earlier during the actual board matching process.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>

No intended functional change, just remove redundancies in some
Makefiles, and make whitespace aesthetics uniform.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: York Sun <york.sun@nxp.com>

Add some tests for the new open drain setting feature of the GPIO
uclass, and extend the capabilities of the sandbox GPIO driver
accordingly.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>

This patch implements the open-drain setting feature for the MPC85XX
GPIO controller.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>

Certain GPIO devices have the capability to switch their GPIOs into
open-drain mode, that is, instead of actively driving the output
(Push-pull output), the pin is connected to the collector (for a NPN
transistor) or the drain (for a MOSFET) of a transistor, respectively.
The pin then either forms an open circuit or a connection to ground,
depending on the state of the transistor.

This patch adds functions to the GPIO uclass to switch GPIOs to
open-drain mode on devices that support it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>

This patch adds a driver for the built-in GPIO controller of the MPC85XX
SoC (probably supporting other PowerQUICC III SoCs as well).

Each GPIO bank is identified by its own entry in the device tree, i.e.

gpio-controller@fc00 {
      #gpio-cells = <2>;
      compatible = "fsl,pq3-gpio";
      reg = <0xfc00 0x100>
}

By default, each bank is assumed to have 32 GPIOs, but the ngpios
setting is honored, so the number of GPIOs for each bank in configurable
to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of
the P1022 SoC).

The usual functions of GPIO drivers (setting input/output mode and output
value setting) are supported.

The driver has been tested on MPC85XX, but it is likely that other
PowerQUICC III devices will work as well.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>

Replace a number of array length calculations with the ARRAY_SIZE()
macro, for clarity.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: York Sun <york.sun@nxp.com>

We should use unified setup_ddr_tlbs() for spl boot and non-spl boot
to make sure 'M' bit is set for DDR TLB to maintain cache coherence.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>