common QE immap file.  Also required for 8360.

Mainly add QE device dependencies, with appropriate 8360 protection.
Lindent also run.

PREREQUISITE PATCHES:

* This patch can only be applied after the following patches have been applied:

  1) DNX#2006092142000015 "Add support for the MPC8349E-mITX  1/2"
  2) DNX#2006092142000024 "Add support for the MPC8349E-mITX  2/2"

CHANGELOG:

* For the 8349E-mITX, fix some size values in pci_init_board(), enable
  the clock for the 2nd USB board (Linux kernel will hang otherwise),
  and fix the CONFIG_BOOTARGS macro.

Signed-off-by: Timur Tabi <timur@freescale.com>

PREREQUISITE PATCHES:

* This patch can only be applied after the following patches have been applied:

  1) DNX#2006090742000024 "Add support for multiple I2C buses"
  2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
  3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
  4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
  5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"

CHANGELOG:

* Add support for the Freescale MPC8349E-mITX reference design platform.
  The second TSEC (Vitesse 7385 switch) is not supported at this time.

Signed-off-by: Timur Tabi <timur@freescale.com>

Hello,

Here is a patch for a file that was accidentally left out of a previous
attempt.

It accompanies the patch with ticket DNX#2006090742000024

CHANGELOG:
        Change PCI initialization to use new multi-bus I2C API.

regards,
Ben

Hello,

Attached is a patch implementing multiple I2C buses on the MPC834x CPU
family and the MPC8349EMDS board in particular.
This patch requires Patch 1 (Add support for multiple I2C buses).
Testing was performed on a 533MHz board.

/*** Note: This patch replaces ticket DNX#2006083042000027 ***/

Signed-off-by: Ben Warren <bwarren@qstreams.com>

CHANGELOG:
        Implemented driver-level code to support two I2C buses on the
MPC834x CPU family and the MPC8349EMDS board.  Available I2C bus speeds
are 50kHz, 100kHz and 400kHz on each bus.

regards,
Ben

Hello,

Attached is a patch providing support for multiple I2C buses at the
command level.  The second part of the patch includes an implementation
for the MPC834x CPU and MPC8349EMDS board.

/*** Note: This patch replaces ticket DNX#2006083042000018 ***/

Signed-off-by: Ben Warren <bwarren@qstreams.com>

Overview:

1. Include new 'i2c' command (based on USB implementation) using
CONFIG_I2C_CMD_TREE.

2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS.  Note that
the commands to change bus number and speed are only available under the
new 'i2c' command mentioned in the first bullet.

3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus
systems.  When CONFIG_I2C_MULTI_BUS is used, this option takes the form
of an array of bus-device pairs.  Otherwise, it is an array of uchar.

CHANGELOG:
        Added new 'i2c' master command for all I2C interaction.  This is
conditionally compiled with CONFIG_I2C_CMD_TREE.  New commands added for
setting I2C bus speed as well as changing the active bus if the board
has more than one (conditionally compiled with
CONFIG_I2C_MULTI_BUS).  Updated NOPROBE logic to handle multiple buses.
Updated README.

regards,
Ben

CHANGELOG:

* Errata DDR6, which affects all current MPC 834x processors, lists changes
  required to maintain compatibility with various types of DDR memory.  This
  patch implements those changes.

Signed-off-by: Timur Tabi <timur@freescale.com>

CHANGELOG:

* On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access
   window registers, instead of using a hard-coded value of 8MB.

Signed-off-by: Timur Tabi <timur@freescale.com>

Unified TQM834x variable names with 83xx and consolidated macro
in preparation for the 8360 and other upcoming 83xx devices.

Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>

Incorporated the common unified variable names and the changes in preparation
for releasing mpc8360 patches.

Signed-off-by: Dave Liu <daveliu@freescale.com>

Make pci build for mpc8349emds

Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>

Removed unused file resetvec.S for mpc83xx cpu

Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>

This patch addresses a problem when CONFIG_MTD_NAND_VERIFY_WRITE is
defined
and the write crosses a block boundary. The pointer to the verification
buffer (bufstart) is not being updated to reflect the starting of the
new
block so the verification of the second block fails.

CHANGELOG:

* Fix NAND FLASH page verification across block boundaries

Added a phy initialization to adjust the RGMII RX and TX timing
Always set the R100 bit in 100 BaseT mode regardless of the TSEC mode

Signed-off-by: Nick Spence <nick.spence@freescale.com>

 - add watchdog support
 - enable GPIO_WKUP_7 pin for input
 - code cleanup

      * remove warnings when compiling ethaddr.c
      * adjust linker script (fixes a crash resulting from incorrect
      definition of __u_boot_cmd_start)
- Some MarelV38B code cleanup.

  MPC5XXX_WU_GPIO_DATA macro to MPC5XXX_WU_GPIO_DATA_O (per MPC5200 User's
  Manual). Replace the uses of MPC5XXX_WU_GPIO_DATA with
  MPC5XXX_WU_GPIO_DATA_O for affected boards.

- Add defintions for some MPC5XXX GPIO pins.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>

Use MACH_TYPE_NETSTAR and MACH_TYPE_VOICEBLUE defines instead of
numbers in code.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>

chpart, nboot and NAND subsystem related commands now accept also partition
name to specify offset.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>

Make sure the string passed as variable name does not contain a '='
character. This not only prevents the common error or typing
"setenv foo=bar" instead of "setenv foo bar", but (more importantly)
also closes a backdoor which allowed to delete write-protected
environment variables, for example by using "setenv ethaddr=".

When passing the -g option to gcc, gcc automatically selects a
suitable --g<format> option to pass on to the assembler.
Thus, there's no point in forcing a specific debug option on the
assembler using the -Wa mechanism.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>

Signed-off-by: Jon Loeliger <jdl@freescale.com>

to a TSEC (e.g. a switch is connected via RMII) or
if the PHY is defective/incorrectly configured.

Signed-off-by: Ben Warren <bwarren@qstreams.com>

to a TSEC (e.g. a switch is connected via RMII) or
if the PHY is defective/incorrectly configured.

Signed-off-by: Ben Warren <bwarren@qstreams.com>

Add atstk1002_config target to Makefile and move the AVR32 section
down below Blackfin so that it doesn't end up in the middle of
MIPS.

Drop the autogenerated linker script thing for now. Will have to
revisit how to handle chips with different flash and RAM layout
later.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>