- Jul 25, 2013
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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git://git.denx.de/u-boot-mipsTom Rini authored
Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by:
Tom Rini <trini@ti.com>
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Tom Rini authored
Acked-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Tom Rini <trini@ti.com>
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- Jul 24, 2013
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Gabor Juhos authored
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Make it similar to the code in mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Make it similar to the code in mips64/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips64/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
The t4 register already holds the cache line size, and the value of the register is not changed in mips_init_icache. Get the cache line size value from t4 for mips_init_dcache as well and remove the superfluous assignment of t5 register. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org>
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Gabor Juhos authored
The MIPS code uses centralized u-boot.lds script already, and dynamic relocation is supported as well. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Nothing is used from asm/mipsregs.h. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Checking mips32/time.c with checkpatch.pl shows this: arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required total: 1 errors, 1 warnings, 0 checks, 85 lines checked Fix the code to make checkpatch.pl happy. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Qemu emulates a PCNET PCI card for the Malta CoreLV board. Enable the pcnet driver and add board specific ethernet initialization function to bring it up. Also enable the CONFIG_CMD_NET and CONFIG_CMD_PING options. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Add minimal support for the MIPS Malta CoreLV board emulated by Qemu. The only supported peripherial is the UART. This is enough to boot U-Boot to the command prompt both in little and big endian mode. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
On the origial Malta boards the REVISION register is accessible at the 0x1fc00010 address. The contents of this register gives information about the revision of the Malta and Core Boards. This register is used by the Linux kernel to identify the actual board it is running on. However the register is not emulated properly by Qemu, so put a hardcoded value into the flash to make Linux work. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
The Linux specific register access macros, the extern function declarations and the UL suffixes has been removed. The header file will be used for the qemu-malta board. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
The pcnet driver uses the pci_phys_to_mem function to get the memory address of the DMA buffers. This This assumes an 1:1 mapping between the PCI and physical memory which is not true on all platforms. On MIPS platform U-Boot is running within a mapped memory region, and the pci_phys_to_mem macro can't be used to obtain the memory address of the buffers. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Tom Rini authored
Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by:
Tom Rini <trini@ti.com>
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git://git.denx.de/u-boot-i2cTom Rini authored
The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by:
Tom Rini <trini@ti.com>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by:
Tom Rini <trini@ti.com>
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Wolfgang Denk authored
Like many other projects, U-Boot has a tradition of including big blocks of License headers in all files. This not only blows up the source code with mostly redundant information, but also makes it very difficult to generate License Clearing Reports. An additional problem is that even the same lincenses are referred to by a number of slightly varying text blocks (full, abbreviated, different indentation, line wrapping and/or white space, with obsolete address information, ...) which makes automatic processing a nightmare. To make this easier, such license headers in the source files will be replaced with a single line reference to Unique Lincense Identifiers as defined by the Linux Foundation's SPDX project [1]. For example, in a source file the full "GPL v2.0 or later" header text will be replaced by a single line: SPDX-License-Identifier: GPL-2.0+ We use the SPDX Unique Lincense Identifiers here; these are available at [2]. Note: From the legal point of view, this patch is supposed to be only a change to the textual representation of the license information, but in no way any change to the actual license terms. With this patch applied, all files will still be licensed under the same terms they were before. Note 2: The apparent difference between the old "COPYING" and the new "Licenses/gpl-2.0.txt" only results from switching to the upstream version of the license which is differently formatted; there are not any actual changes to the content. Note 3: There are some recurring questions about linense issues, such as: - Is a "All Rights Reserved" clause a problem in GPL code? - Are files without any license header a problem? - Do we need license headers at all? The following excerpt from an e-mail by Daniel B. Ravicher should help with these: | Message-ID: <4ADF8CAA.5030808@softwarefreedom.org> | Date: Wed, 21 Oct 2009 18:35:22 -0400 | From: "Daniel B. Ravicher" <ravicher@softwarefreedom.org> | To: Wolfgang Denk <wd@denx.de> | Subject: Re: GPL and license cleanup questions | | Mr. Denk, | | Wolfgang Denk wrote: | > - There are a number of files which do not include any specific | > license information at all. Is it correct to assume that these files | > are automatically covered by the "GPL v2 or later" clause as | > specified by the COPYING file in the top level directory of the | > U-Boot source tree? | | That is a very fact specific analysis and could be different across the | various files. However, if the contributor could reasonably be expected | to have known that the project was licensed GPLv2 or later at the time | she made her contribution, then a reasonably implication is that she | consented to her contributions being distributed under those terms. | | > - Do such files need any clean up, for example should we add GPL | > headers to them, or is this not needed? | | If the project as a whole is licensed under clear terms, you need not | identify those same terms in each file, although there is no harm in | doing so. | | > - There are other files, which include both a GPL license header | > _plus_ some copyright note with an "All Rights Reserved" clause. It | > has been my understanding that this is a conflict, and me must ask | > the copyright holders to remove such "All Rights Reserved" clauses. | > But then, some people claim that "All Rights Reserved" is a no-op | > nowadays. License checking tools (like OSLC) seem to indicate this is | > a problem, but then we see quite a lot of "All rights reserved" in | > BSD-licensed files in gcc and glibc. So what is the correct way to | > deal with such files? | | It is not a conflict to grant a license and also reserve all rights, as | implicit in that language is that you are reserving all "other" rights | not granted in the license. Thus, a file with "Licensed under GPL, All | Rights Reserved" would mean that it is licensed under the GPL, but no | other rights are given to copy, modify or redistribute it. | | Warm regards, | --Dan | | Daniel B. Ravicher, Legal Director | Software Freedom Law Center (SFLC) and Moglen Ravicher LLC | 1995 Broadway, 17th Fl., New York, NY 10023 | (212) 461-1902 direct (212) 580-0800 main (212) 580-0898 fax | ravicher@softwarefreedom.org www.softwarefreedom.org [1] http://spdx.org/ [2] http://spdx.org/licenses/ Signed-off-by:
Wolfgang Denk <wd@denx.de>
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- Jul 23, 2013
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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naveen krishna chatradhi authored
Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by:
Naveen Krishna Chatradhi <ch.naveen@samsung.com>
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Kuo-Jung Su authored
Faraday FTI2C010 is a multi-function I2C controller which supports both master and slave mode. This patch simplily implements the master mode only. Signed-off-by:
Kuo-Jung Su <dantesu@faraday-tech.com> CC: Heiko Schocher <hs@denx.de>
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Alison Wang authored
This patch adds support for Vybrid VF610 platform. There are some differences between i.MX6 and Vybrid for I2C controller. (1) The registers' offset are different. (2) The I2C clock divider values are different. (3) In I2C control register, the enable/disable/reset bit is inverted for Vybrid comparing to i.MX6. (4) In I2C status register, the interrupt flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". (5) In I2C status register, the arbitration lost flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". Signed-off-by:
Alison Wang <b18965@freescale.com>
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Alison Wang authored
This patch adds I2C support for Vybrid VF610 platform and adds I2C0 support to VF610TWR board. Signed-off-by:
Alison Wang <b18965@freescale.com>
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Axel Lin authored
Signed-off-by:
Axel Lin <axel.lin@ingics.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Holger Brunck authored
Due to the new I2C framework we need to adapt the u-boot update function. Due to the new framework all i2c leafs behind a mux are present in the system and not only those who are defined and used. So it is bus number 5 after the rework. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> cc: Heiko Schocher <hs@denx.de> cc: Prafulla Wadaskar <prafulla@marvell.com>
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