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Commit f225d39d authored by Jon Medhurst \(Tixy\)'s avatar Jon Medhurst \(Tixy\) Committed by Tom Rini
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vexpress: Check TC2 firmware support before defaulting to nonsec booting


The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.

Signed-off-by: default avatarJon Medhurst <tixy@linaro.org>
Reviewed-by: default avatarRyan Harkin <ryan.harkin@linaro.org>
Tested-by: default avatarRyan Harkin <ryan.harkin@linaro.org>
parent 0fcb9f07
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...@@ -248,15 +248,20 @@ static void boot_prep_linux(bootm_headers_t *images) ...@@ -248,15 +248,20 @@ static void boot_prep_linux(bootm_headers_t *images)
} }
} }
#ifdef CONFIG_ARMV7_NONSEC __weak bool armv7_boot_nonsec_default(void)
bool armv7_boot_nonsec(void)
{ {
char *s = getenv("bootm_boot_mode");
#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT #ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
bool nonsec = false; return false;
#else #else
bool nonsec = true; return true;
#endif #endif
}
#ifdef CONFIG_ARMV7_NONSEC
bool armv7_boot_nonsec(void)
{
char *s = getenv("bootm_boot_mode");
bool nonsec = armv7_boot_nonsec_default();
if (s && !strcmp(s, "sec")) if (s && !strcmp(s, "sec"))
nonsec = false; nonsec = false;
......
...@@ -6,3 +6,4 @@ ...@@ -6,3 +6,4 @@
# #
obj-y := vexpress_common.o obj-y := vexpress_common.o
obj-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress_tc2.o
/*
* (C) Copyright 2016 Linaro
* Jon Medhurst <tixy@linaro.org>
*
* TC2 specific code for Versatile Express.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/io.h>
#define SCC_BASE 0x7fff0000
bool armv7_boot_nonsec_default(void)
{
#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
return false
#else
/*
* The Serial Configuration Controller (SCC) register at address 0x700
* contains flags for configuring the behaviour of the Boot Monitor
* (which CPUs execute from reset). Two of these bits are of interest:
*
* bit 12 = Use per-cpu mailboxes for power management
* bit 13 = Power down the non-boot cluster
*
* It is only when both of these are false that U-Boot's current
* implementation of 'nonsec' mode can work as expected because we
* rely on getting all CPUs to execute _nonsec_init, so let's check that.
*/
return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0;
#endif
}
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