Skip to content
Snippets Groups Projects
Commit e7fbcbc2 authored by Enric Balletbo i Serra's avatar Enric Balletbo i Serra Committed by Tom Rini
Browse files

igep00x0: Use the SRAM available for SPL.


Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE
to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear
what the limit is.

This will also help some compilers to fit all the code into the allocated
space.

Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
parent 8edeac86
No related branches found
No related tags found
No related merge requests found
...@@ -19,6 +19,13 @@ ...@@ -19,6 +19,13 @@
#include <configs/ti_omap3_common.h> #include <configs/ti_omap3_common.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
#undef CONFIG_SPL_MAX_SIZE
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_TEXT_BASE 0x40200000
/* /*
* Display CPU and Board information * Display CPU and Board information
*/ */
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment