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Commit e5ec8b62 authored by Troy Kisky's avatar Troy Kisky
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iomux-mx51.h: add MX51_PAD's for nitrogen51_vm 


Signed-off-by: default avatarTroy Kisky <troy.kisky@boundarydevices.com>
parent 4fec2aaa
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arch/arm/include/asm/arch-mx5/iomux-mx51.h
+ 85
− 10
View file @ e5ec8b62
......@@ -44,23 +44,33 @@
/* PAD MUX ALT INPSE PATH PADCTRL */
enum {
MX51_PAD_EIM_D16__GPIO2_0 = IOMUX_PAD(0x3f0, 0x05c, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D16__USBH2_DATA0 = IOMUX_PAD(0x3f0, 0x05c, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D16__I2C1_SDA = IOMUX_PAD(0x3f0, 0x05c, 0x14, 0x9b4, 0, MX51_I2C_PAD_CTRL),
MX51_PAD_EIM_D17__GPIO2_1 = IOMUX_PAD(0x3f4, 0x060, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D17__USBH2_DATA1 = IOMUX_PAD(0x3f4, 0x060, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D18__USBH2_DATA2 = IOMUX_PAD(0x3f8, 0x064, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D19__GPIO2_3 = IOMUX_PAD(0x3fc, 0x068, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D19__USBH2_DATA3 = IOMUX_PAD(0x3fc, 0x068, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D19__I2C1_SCL = IOMUX_PAD(0x3fc, 0x068, 0x14, 0x9b0, 0, MX51_I2C_PAD_CTRL),
MX51_PAD_EIM_D20__USBH2_DATA4 = IOMUX_PAD(0x400, 0x06c, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D21__GPIO2_5 = IOMUX_PAD(0x404, 0x070, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D21__USBH2_DATA5 = IOMUX_PAD(0x404, 0x070, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D22__GPIO2_6 = IOMUX_PAD(0x408, 0x074, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D22__USBH2_DATA6 = IOMUX_PAD(0x408, 0x074, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D23__USBH2_DATA7 = IOMUX_PAD(0x40c, 0x078, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_D24__GPIO2_8 = IOMUX_PAD(0x410, 0x07c, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D24__I2C2_SDA = IOMUX_PAD(0x410, 0x07c, 0x14, 0x9bc, 0, MX51_I2C_PAD_CTRL),
MX51_PAD_EIM_D25__UART3_RXD = IOMUX_PAD(0x414, 0x080, 3, 0x9f4, 0, MX51_UART_PAD_CTRL),
MX51_PAD_EIM_D26__KEY_COL7 = IOMUX_PAD(0x418, 0x084, 1, 0x9cc, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D26__UART3_TXD = IOMUX_PAD(0x418, 0x084, 3, __NA_, 0, MX51_UART_PAD_CTRL),
MX51_PAD_EIM_D27__GPIO2_9 = IOMUX_PAD(0x41c, 0x088, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_D27__I2C2_SCL = IOMUX_PAD(0x41c, 0x088, 0x14, 0x9b8, 0, MX51_I2C_PAD_CTRL),
MX51_PAD_EIM_A16__GPIO2_10 = IOMUX_PAD(0x430, 0x09c, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_A17__GPIO2_11 = IOMUX_PAD(0x434, 0x0a0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_A20__GPIO2_14 = IOMUX_PAD(0x440, 0x0ac, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_A22__GPIO2_16 = IOMUX_PAD(0x448, 0x0b4, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_A23__GPIO2_17 = IOMUX_PAD(0x44c, 0x0b8, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_EIM_A24__USBH2_CLK = IOMUX_PAD(0x450, 0x0bc, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_A25__USBH2_DIR = IOMUX_PAD(0x454, 0x0c0, 2, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_EIM_A26__GPIO2_20 = IOMUX_PAD(0x458, 0x0c4, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
......@@ -94,17 +104,26 @@ enum {
MX51_PAD_DRAM_DQM2__DRAM_DQM2 = IOMUX_PAD(0x4dc, __NA_, 0, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_DRAM_DQM3__DRAM_DQM3 = IOMUX_PAD(0x4e0, __NA_, 0, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_WE_B__PATA_DIOW = IOMUX_PAD(0x4e4, 0x108, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_WE_B__GPIO3_3 = IOMUX_PAD(0x4e4, 0x108, 3, 0x980, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_RE_B__PATA_DIOR = IOMUX_PAD(0x4e8, 0x10c, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_RE_B__GPIO3_4 = IOMUX_PAD(0x4e8, 0x10c, 3, 0x984, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_ALE__PATA_BUFFER_EN = IOMUX_PAD(0x4ec, 0x110, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_CLE__PATA_RESET_B = IOMUX_PAD(0x4f0, 0x114, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_CLE__GPIO3_6 = IOMUX_PAD(0x4f0, 0x114, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_WP_B__PATA_DMACK = IOMUX_PAD(0x4f4, 0x118, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_WP_B__GPIO3_7 = IOMUX_PAD(0x4f4, 0x118, 3, 0x990, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_RB0__PATA_DMARQ = IOMUX_PAD(0x4f8, 0x11c, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_RB0__GPIO3_8 = IOMUX_PAD(0x4f8, 0x11c, 3, 0x994, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_RB1__PATA_IORDY = IOMUX_PAD(0x4fc, 0x120, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_RB1__GPIO3_9 = IOMUX_PAD(0x4fc, 0x120, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_RB2__FEC_COL = IOMUX_PAD(0x500, 0x124, 1, 0x94c, 0, MX51_PAD_CTRL_2),
MX51_PAD_NANDF_RB2__GPIO3_10 = IOMUX_PAD(0x500, 0x124, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_RB3__FEC_RX_CLK = IOMUX_PAD(0x504, 0x128, 1, 0x968, 0, MX51_PAD_CTRL_2),
MX51_PAD_NANDF_RB3__GPIO3_11 = IOMUX_PAD(0x504, 0x128, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO_NAND__GPIO3_12 = IOMUX_PAD(0x514, 0x12c, 0, 0x998, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO_NAND__PATA_INTRQ = IOMUX_PAD(0x514, 0x12c, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_CS0__GPIO3_16 = IOMUX_PAD(0x518, 0x130, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_CS1__GPIO3_17 = IOMUX_PAD(0x51c, 0x134, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_CS2__FEC_TX_ER = IOMUX_PAD(0x520, 0x138, 2, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_NANDF_CS2__PATA_CS_0 = IOMUX_PAD(0x520, 0x138, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_CS3__FEC_MDC = IOMUX_PAD(0x524, 0x13c, 2, __NA_, 0, MX51_PAD_CTRL_5),
......@@ -124,6 +143,7 @@ enum {
MX51_PAD_NANDF_D13__GPIO3_27 = IOMUX_PAD(0x544, 0x15c, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_D13__PATA_DATA13 = IOMUX_PAD(0x544, 0x15c, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_D12__PATA_DATA12 = IOMUX_PAD(0x548, 0x160, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_D12__GPIO3_28 = IOMUX_PAD(0x548, 0x160, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_NANDF_D11__FEC_RX_DV = IOMUX_PAD(0x54c, 0x164, 2, 0x96c, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_D11__PATA_DATA11 = IOMUX_PAD(0x54c, 0x164, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_NANDF_D10__GPIO3_30 = IOMUX_PAD(0x550, 0x168, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
......@@ -143,6 +163,10 @@ enum {
MX51_PAD_NANDF_D0__PATA_DATA0 = IOMUX_PAD(0x578, 0x190, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_CSI2_D12__GPIO4_9 = IOMUX_PAD(0x5bc, 0x1cc, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_CSI2_D13__GPIO4_10 = IOMUX_PAD(0x5c0, 0x1d0, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_I2C1_CLK__I2C1_CLK = IOMUX_PAD(0x5e8, 0x1f8, 0x10, __NA_, 0, MX51_I2C_PAD_CTRL),
MX51_PAD_I2C1_CLK__GPIO4_16 = IOMUX_PAD(0x5e8, 0x1f8, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_I2C1_DAT__I2C1_DAT = IOMUX_PAD(0x5ec, 0x1fc, 0x10, __NA_, 0, MX51_I2C_PAD_CTRL),
MX51_PAD_I2C1_DAT__GPIO4_17 = IOMUX_PAD(0x5ec, 0x1fc, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI = IOMUX_PAD(0x600, 0x210, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),
MX51_PAD_CSPI1_MISO__ECSPI1_MISO = IOMUX_PAD(0x604, 0x214, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),
MX51_PAD_CSPI1_SS0__ECSPI1_SS0 = IOMUX_PAD(0x608, 0x218, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL),
......@@ -155,7 +179,13 @@ enum {
MX51_PAD_UART1_RXD__UART1_RXD = IOMUX_PAD(0x618, 0x228, 0, 0x9e4, 0, MX51_UART_PAD_CTRL),
MX51_PAD_UART1_TXD__UART1_TXD = IOMUX_PAD(0x61c, 0x22c, 0, __NA_, 0, MX51_UART_PAD_CTRL),
MX51_PAD_UART1_RTS__UART1_RTS = IOMUX_PAD(0x620, 0x230, 0, 0x9e0, 0, MX51_UART_PAD_CTRL),
MX51_PAD_UART1_RTS__GPIO4_30 = IOMUX_PAD(0x620, 0x230, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_UART1_CTS__UART1_CTS = IOMUX_PAD(0x624, 0x234, 0, __NA_, 0, MX51_UART_PAD_CTRL),
MX51_PAD_UART1_CTS__GPIO4_31 = IOMUX_PAD(0x624, 0x234, 3, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_UART2_RXD__UART2_RXD = IOMUX_PAD(0x628, 0x238, 0, 0x9ec, 2, MX51_UART_PAD_CTRL),
MX51_PAD_UART2_TXD__UART2_TXD = IOMUX_PAD(0x62c, 0x23c, 0, __NA_, 0, MX51_UART_PAD_CTRL),
MX51_PAD_UART3_RXD__UART3_RXD = IOMUX_PAD(0x630, 0x240, 1, 0x9f4, 4, MX51_UART_PAD_CTRL),
MX51_PAD_UART3_TXD__UART3_TXD = IOMUX_PAD(0x634, 0x244, 1, __NA_, 0, MX51_UART_PAD_CTRL),
MX51_PAD_USBH1_CLK__USBH1_CLK = IOMUX_PAD(0x678, 0x278, 0, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_USBH1_DIR__USBH1_DIR = IOMUX_PAD(0x67c, 0x27c, 0, __NA_, 0, MX51_USBH_PAD_CTRL),
MX51_PAD_USBH1_STP__GPIO1_27 = IOMUX_PAD(0x680, 0x280, 2, __NA_, 0, MX51_GPIO_PAD_CTRL),
......@@ -176,43 +206,88 @@ enum {
MX51_PAD_DI1_D1_CS__GPIO3_4 = IOMUX_PAD(0x6b8, 0x2b8, 4, 0x984, 1, MX51_GPIO_PAD_CTRL),
MX51_PAD_DISPB2_SER_DIN__GPIO3_5 = IOMUX_PAD(0x6bc, 0x2bc, 4, 0x988, 1, MX51_GPIO_PAD_CTRL),
MX51_PAD_DISPB2_SER_DIO__GPIO3_6 = IOMUX_PAD(0x6c0, 0x2c0, 4, 0x98c, 1, MX51_GPIO_PAD_CTRL),
MX51_PAD_DISP1_DAT0__DISP1_DAT0 = IOMUX_PAD(0x6cc, 0x2cc, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT1__DISP1_DAT1 = IOMUX_PAD(0x6d0, 0x2d0, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT2__DISP1_DAT2 = IOMUX_PAD(0x6d4, 0x2d4, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT3__DISP1_DAT3 = IOMUX_PAD(0x6d8, 0x2d8, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT4__DISP1_DAT4 = IOMUX_PAD(0x6dc, 0x2dc, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT5__DISP1_DAT5 = IOMUX_PAD(0x6e0, 0x2e0, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT6__DISP1_DAT6 = IOMUX_PAD(0x6e4, 0x2e4, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT7__DISP1_DAT7 = IOMUX_PAD(0x6e8, 0x2e8, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT8__DISP1_DAT8 = IOMUX_PAD(0x6ec, 0x2ec, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT9__DISP1_DAT9 = IOMUX_PAD(0x6f0, 0x2f0, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT10__DISP1_DAT10 = IOMUX_PAD(0x6f4, 0x2f4, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT11__DISP1_DAT11 = IOMUX_PAD(0x6f8, 0x2f8, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT12__DISP1_DAT12 = IOMUX_PAD(0x6fc, 0x2fc, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT13__DISP1_DAT13 = IOMUX_PAD(0x700, 0x300, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT14__DISP1_DAT14 = IOMUX_PAD(0x704, 0x304, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT15__DISP1_DAT15 = IOMUX_PAD(0x708, 0x308, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT16__DISP1_DAT16 = IOMUX_PAD(0x70c, 0x30c, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT17__DISP1_DAT17 = IOMUX_PAD(0x710, 0x310, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT18__DISP1_DAT18 = IOMUX_PAD(0x714, 0x314, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT19__DISP1_DAT19 = IOMUX_PAD(0x718, 0x318, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT20__DISP1_DAT20 = IOMUX_PAD(0x71c, 0x31c, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT21__DISP1_DAT21 = IOMUX_PAD(0x720, 0x320, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT22__DISP1_DAT22 = IOMUX_PAD(0x724, 0x324, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP1_DAT23__DISP1_DAT23 = IOMUX_PAD(0x728, 0x328, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DI1_PIN3__DI1_PIN3 = IOMUX_PAD(0x72c, 0x32c, 0, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_DI1_DISP_CLK__DI1_DISP_CLK = IOMUX_PAD(0x730, 0x000, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DI1_PIN2__DI1_PIN2 = IOMUX_PAD(0x734, 0x330, 0, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_DI1_PIN15__DI1_PIN15 = IOMUX_PAD(0x738, 0x000, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DI2_PIN2__FEC_MDC = IOMUX_PAD(0x74C, 0x344, 2, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK = IOMUX_PAD(0x754, 0x34c, 0, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_DI_GP4__DI2_PIN15 = IOMUX_PAD(0x758, 0x350, 4, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_DISP2_DAT0__DISP2_DAT0 = IOMUX_PAD(0x75c, 0x354, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT1__DISP2_DAT1 = IOMUX_PAD(0x760, 0x358, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT2__DISP2_DAT2 = IOMUX_PAD(0x764, 0x35c, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT3__DISP2_DAT3 = IOMUX_PAD(0x768, 0x360, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT4__DISP2_DAT4 = IOMUX_PAD(0x76c, 0x364, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT5__DISP2_DAT5 = IOMUX_PAD(0x770, 0x368, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT6__DISP2_DAT6 = IOMUX_PAD(0x774, 0x36c, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT6__FEC_TDAT1 = IOMUX_PAD(0x774, 0x36C, 2, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT7__DISP2_DAT7 = IOMUX_PAD(0x778, 0x370, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT7__FEC_TDAT2 = IOMUX_PAD(0x778, 0x370, 2, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT8__DISP2_DAT8 = IOMUX_PAD(0x77c, 0x374, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT8__FEC_TDAT3 = IOMUX_PAD(0x77C, 0x374, 2, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT9__DISP2_DAT9 = IOMUX_PAD(0x780, 0x378, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT9__FEC_TX_EN = IOMUX_PAD(0x780, 0x378, 2, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT10__DISP2_DAT10 = IOMUX_PAD(0x784, 0x37c, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT10__FEC_COL = IOMUX_PAD(0x784, 0x37C, 2, 0x94c, 0x1, MX51_PAD_CTRL_2),
MX51_PAD_DISP2_DAT11__DISP2_DAT11 = IOMUX_PAD(0x788, 0x380, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT11__FEC_RXCLK = IOMUX_PAD(0x788, 0x380, 2, 0x968, 0x1, MX51_PAD_CTRL_2),
MX51_PAD_DISP2_DAT12__DISP2_DAT12 = IOMUX_PAD(0x78c, 0x384, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT12__FEC_RX_DV = IOMUX_PAD(0x78C, 0x384, 2, 0x96c, 0x1, MX51_PAD_CTRL_4),
MX51_PAD_DISP2_DAT13__DISP2_DAT13 = IOMUX_PAD(0x790, 0x388, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT13__FEC_TX_CLK = IOMUX_PAD(0x790, 0x388, 2, 0x974, 0x1, MX51_PAD_CTRL_4),
MX51_PAD_DISP2_DAT14__DISP2_DAT14 = IOMUX_PAD(0x794, 0x38c, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT14__FEC_RDAT0 = IOMUX_PAD(0x794, 0x38C, 2, 0x958, 0x1, MX51_PAD_CTRL_4),
MX51_PAD_DISP2_DAT15__DISP2_DAT15 = IOMUX_PAD(0x798, 0x390, 0, __NA_, 0, MX51_PAD_CTRL_5),
MX51_PAD_DISP2_DAT15__FEC_TDAT0 = IOMUX_PAD(0x798, 0x390, 2, 0x0, 0, MX51_PAD_CTRL_5),
MX51_PAD_SD1_CMD__SD1_CMD = IOMUX_PAD(0x79c, 0x394, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_CLK__SD1_CLK = IOMUX_PAD(0x7a0, 0x398, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS),
MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_DATA1__SD1_DATA1 = IOMUX_PAD(0x7a8, 0x3a0, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_DATA2__SD1_DATA2 = IOMUX_PAD(0x7ac, 0x3a4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_DATA3__SD1_DATA3 = IOMUX_PAD(0x7b0, 0x3a8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_CLK__SD1_CLK = IOMUX_PAD(0x7a0, 0x398, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS),
MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_DATA1__SD1_DATA1 = IOMUX_PAD(0x7a8, 0x3a0, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_DATA2__SD1_DATA2 = IOMUX_PAD(0x7ac, 0x3a4, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD1_DATA3__SD1_DATA3 = IOMUX_PAD(0x7b0, 0x3a8, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_GPIO1_0__GPIO1_0 = IOMUX_PAD(0x7b4, 0x3ac, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_0__SD1_CD = IOMUX_PAD(0x7b4, 0x3ac, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL),
MX51_PAD_GPIO1_1__SD1_WP = IOMUX_PAD(0x7b8, 0x3b0, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL),
MX51_PAD_GPIO1_1__GPIO1_1 = IOMUX_PAD(0x7b8, 0x3b0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_SD2_CMD__SD2_CMD = IOMUX_PAD(0x7bc, 0x3b4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_CLK__SD2_CLK = IOMUX_PAD(0x7c0, 0x3b8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS),
MX51_PAD_SD2_DATA0__SD2_DATA0 = IOMUX_PAD(0x7c4, 0x3bc, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_DATA1__SD2_DATA1 = IOMUX_PAD(0x7c8, 0x3c0, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_DATA2__SD2_DATA2 = IOMUX_PAD(0x7cc, 0x3c4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_DATA3__SD2_DATA3 = IOMUX_PAD(0x7d0, 0x3c8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_CLK__SD2_CLK = IOMUX_PAD(0x7c0, 0x3b8, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS),
MX51_PAD_SD2_DATA0__SD2_DATA0 = IOMUX_PAD(0x7c4, 0x3bc, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_DATA1__SD2_DATA1 = IOMUX_PAD(0x7c8, 0x3c0, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_DATA2__SD2_DATA2 = IOMUX_PAD(0x7cc, 0x3c4, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_SD2_DATA3__SD2_DATA3 = IOMUX_PAD(0x7d0, 0x3c8, 0, __NA_, 0, MX51_SDHCI_PAD_CTRL),
MX51_PAD_GPIO1_2__GPIO1_2 = IOMUX_PAD(0x7d4, 0x3cc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_2__PWM1_PWMO = IOMUX_PAD(0x7d4, 0x3cc, 1, __NA_, 0, NO_PAD_CTRL),
MX51_PAD_GPIO1_3__GPIO1_3 = IOMUX_PAD(0x7d8, 0x3d0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_4__GPIO1_4 = IOMUX_PAD(0x804, 0x3d8, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_5__GPIO1_5 = IOMUX_PAD(0x808, 0x3dc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_6__GPIO1_6 = IOMUX_PAD(0x80c, 0x3e0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_7__GPIO1_7 = IOMUX_PAD(0x810, 0x3e4, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_7__SD2_WP = IOMUX_PAD(0x810, 0x3e4, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL),
MX51_PAD_GPIO1_8__GPIO1_8 = IOMUX_PAD(0x814, 0x3e8, 0, __NA_, 0, MX51_GPIO_PAD_CTRL),
MX51_PAD_GPIO1_8__SD2_CD = IOMUX_PAD(0x814, 0x3e8, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL),
MX51_GRP_DDRPKS = IOMUX_PAD(0x820, __NA_, 0, __NA_, 0, NO_PAD_CTRL),
MX51_GRP_DRAM_B4 = IOMUX_PAD(0x82c, __NA_, 0, __NA_, 0, NO_PAD_CTRL),
......
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