armv8/layerscape: Update MMU table with execute-never bits
For most device addresses excution shouldn't be allowed. Revise the MMU table to enforce execute-never bits. OCRAM, DDR and IFC are allowed for excution. Signed-off-by:York Sun <yorksun@freescale.com> Signed-off-by:
Alison Wang <alison.wang@freescale.com> Reported-by:
Zhichun Hua <zhichun.hua@freescale.com>
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- arch/arm/cpu/armv8/cache_v8.c 2 additions, 2 deletionsarch/arm/cpu/armv8/cache_v8.c
- arch/arm/cpu/armv8/fsl-layerscape/cpu.c 1 addition, 1 deletionarch/arm/cpu/armv8/fsl-layerscape/cpu.c
- arch/arm/include/asm/arch-fsl-layerscape/cpu.h 52 additions, 27 deletionsarch/arm/include/asm/arch-fsl-layerscape/cpu.h
- arch/arm/include/asm/armv8/mmu.h 1 addition, 1 deletionarch/arm/include/asm/armv8/mmu.h
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