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Commit c7430d7d authored by Fabio Estevam's avatar Fabio Estevam Committed by Anatolij Gustschin
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ipu_common: Let the MX6 IPU clock be calculated in run-time


MX6Q/QP IPU operates at 264MHz and MX6DL IPU at 198MHz.

When running a SPL target, which supports multiple MX6 variants we cannot
properly setup the IPU clock frequency via CONFIG_IPUV3_CLK option as
such decision is done in build-time currently.

Remove the CONFIG_IPUV3_CLK option and let the IPU clock frequency be
configured in run-time on mx6.

Reported-by: default avatarEric Nelson <eric@nelint.com>
Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: default avatarEric Nelson <eric@nelint.com>
Reviewed-by: default avatarStefano Babic <sbabic@denx.de>
[agust: fixed #endif in cgtqmx6eval.h]
Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
parent 584f316f
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with 13 additions and 28 deletions
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <linux/errno.h> #include <linux/errno.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/arch/sys_proto.h>
#include <div64.h> #include <div64.h>
#include "ipu.h" #include "ipu.h"
#include "ipu_regs.h" #include "ipu_regs.h"
...@@ -81,6 +82,11 @@ struct ipu_ch_param { ...@@ -81,6 +82,11 @@ struct ipu_ch_param {
#define IPU_SW_RST_TOUT_USEC (10000) #define IPU_SW_RST_TOUT_USEC (10000)
#define IPUV3_CLK_MX51 133000000
#define IPUV3_CLK_MX53 200000000
#define IPUV3_CLK_MX6Q 264000000
#define IPUV3_CLK_MX6DL 198000000
void clk_enable(struct clk *clk) void clk_enable(struct clk *clk)
{ {
if (clk) { if (clk) {
...@@ -196,7 +202,6 @@ static void clk_ipu_disable(struct clk *clk) ...@@ -196,7 +202,6 @@ static void clk_ipu_disable(struct clk *clk)
static struct clk ipu_clk = { static struct clk ipu_clk = {
.name = "ipu_clk", .name = "ipu_clk",
.rate = CONFIG_IPUV3_CLK,
#if defined(CONFIG_MX51) || defined(CONFIG_MX53) #if defined(CONFIG_MX51) || defined(CONFIG_MX53)
.enable_reg = (u32 *)(CCM_BASE_ADDR + .enable_reg = (u32 *)(CCM_BASE_ADDR +
offsetof(struct mxc_ccm_reg, CCGR5)), offsetof(struct mxc_ccm_reg, CCGR5)),
...@@ -476,6 +481,13 @@ int ipu_probe(void) ...@@ -476,6 +481,13 @@ int ipu_probe(void)
g_pixel_clk[1] = &pixel_clk[1]; g_pixel_clk[1] = &pixel_clk[1];
g_ipu_clk = &ipu_clk; g_ipu_clk = &ipu_clk;
#if defined(CONFIG_MX51)
g_ipu_clk->rate = IPUV3_CLK_MX51;
#elif defined(CONFIG_MX53)
g_ipu_clk->rate = IPUV3_CLK_MX53;
#else
g_ipu_clk->rate = is_mx6sdl() ? IPUV3_CLK_MX6DL : IPUV3_CLK_MX6Q;
#endif
debug("ipu_clk = %u\n", clk_get_rate(g_ipu_clk)); debug("ipu_clk = %u\n", clk_get_rate(g_ipu_clk));
g_ldb_clk = &ldb_clk; g_ldb_clk = &ldb_clk;
debug("ldb_clk = %u\n", clk_get_rate(g_ldb_clk)); debug("ldb_clk = %u\n", clk_get_rate(g_ldb_clk));
......
...@@ -253,7 +253,6 @@ ...@@ -253,7 +253,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
#endif #endif
......
...@@ -117,7 +117,6 @@ ...@@ -117,7 +117,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_CONSOLE_MUX #define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
......
...@@ -214,7 +214,6 @@ ...@@ -214,7 +214,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 198000000
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_PWM_IMX #define CONFIG_PWM_IMX
......
...@@ -78,11 +78,6 @@ ...@@ -78,11 +78,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#ifdef CONFIG_MX6DL
#define CONFIG_IPUV3_CLK 198000000
#else
#define CONFIG_IPUV3_CLK 264000000
#endif
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
/* SATA */ /* SATA */
......
...@@ -236,7 +236,6 @@ ...@@ -236,7 +236,6 @@
/* Display */ /* Display */
#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_IPUV3
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN
......
...@@ -103,7 +103,6 @@ ...@@ -103,7 +103,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_CONSOLE_MUX #define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
......
...@@ -108,7 +108,6 @@ ...@@ -108,7 +108,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
......
...@@ -277,7 +277,6 @@ ...@@ -277,7 +277,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
#endif #endif
......
...@@ -156,7 +156,6 @@ ...@@ -156,7 +156,6 @@
/* Framebuffer and LCD */ /* Framebuffer and LCD */
#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_IPUV3
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
......
...@@ -199,7 +199,6 @@ ...@@ -199,7 +199,6 @@
/* Framebuffer */ /* Framebuffer */
#ifdef CONFIG_VIDEO_IPUV3 #ifdef CONFIG_VIDEO_IPUV3
# define CONFIG_IPUV3_CLK 260000000
# define CONFIG_IMX_VIDEO_SKIP # define CONFIG_IMX_VIDEO_SKIP
# define CONFIG_SPLASH_SCREEN # define CONFIG_SPLASH_SCREEN
......
...@@ -172,7 +172,6 @@ ...@@ -172,7 +172,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
#define CONFIG_IPUV3_CLK 200000000
#endif #endif
/* /*
......
...@@ -84,7 +84,6 @@ ...@@ -84,7 +84,6 @@
#define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 133000000
/* allow to overwrite serial and ethaddr */ /* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_OVERWRITE
......
...@@ -179,6 +179,5 @@ ...@@ -179,6 +179,5 @@
#define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 200000000
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */
...@@ -197,6 +197,5 @@ ...@@ -197,6 +197,5 @@
#define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 200000000
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */
...@@ -41,7 +41,6 @@ ...@@ -41,7 +41,6 @@
/* Framebuffer */ /* Framebuffer */
#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_IPUV3
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN #define CONFIG_SPLASH_SCREEN_ALIGN
......
...@@ -205,11 +205,6 @@ ...@@ -205,11 +205,6 @@
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_VIDEO_BMP_LOGO
#ifdef CONFIG_MX6DL
#define CONFIG_IPUV3_CLK 198000000
#else
#define CONFIG_IPUV3_CLK 264000000
#endif
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
......
...@@ -80,7 +80,6 @@ ...@@ -80,7 +80,6 @@
#define CONFIG_VIDEO_BMP_GZIP #define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024)
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
......
...@@ -141,7 +141,6 @@ ...@@ -141,7 +141,6 @@
#define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP #define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
#endif #endif
......
...@@ -64,7 +64,6 @@ ...@@ -64,7 +64,6 @@
/* Framebuffer */ /* Framebuffer */
#ifdef CONFIG_VIDEO #ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_IPUV3
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_IMX_VIDEO_SKIP
......
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