Skip to content
Snippets Groups Projects
Commit c4ef14d2 authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Alexey Brodkin
Browse files

ARC: Cache: Remove per-line I$ operations as unused


__cache_line_loop() function was copied from Linux kernel
where per-line instruction cache operations are really used.

In U-Boot we use only entire I$ ops, so we can drop support of
per-line I$ ops from __cache_line_loop() because __cache_line_loop()
is never called with OP_INV_IC parameter.

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
parent 16aeee81
No related branches found
No related tags found
No related merge requests found
...@@ -23,7 +23,6 @@ ...@@ -23,7 +23,6 @@
#define OP_INV 0x1 #define OP_INV 0x1
#define OP_FLUSH 0x2 #define OP_FLUSH 0x2
#define OP_INV_IC 0x3
/* Bit val in SLC_CONTROL */ /* Bit val in SLC_CONTROL */
#define SLC_CTRL_DIS 0x001 #define SLC_CTRL_DIS 0x001
...@@ -373,30 +372,15 @@ void dcache_disable(void) ...@@ -373,30 +372,15 @@ void dcache_disable(void)
} }
#ifndef CONFIG_SYS_DCACHE_OFF #ifndef CONFIG_SYS_DCACHE_OFF
/* /* Common Helper for Line Operations on D-cache */
* Common Helper for Line Operations on {I,D}-Cache static inline void __dcache_line_loop(unsigned long paddr, unsigned long sz,
*/ const int cacheop)
static inline void __cache_line_loop(unsigned long paddr, unsigned long sz,
const int cacheop)
{ {
unsigned int aux_cmd; unsigned int aux_cmd;
#if (CONFIG_ARC_MMU_VER == 3)
unsigned int aux_tag;
#endif
int num_lines; int num_lines;
if (cacheop == OP_INV_IC) { /* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = ARC_AUX_IC_IVIL; aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
#if (CONFIG_ARC_MMU_VER == 3)
aux_tag = ARC_AUX_IC_PTAG;
#endif
} else {
/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
#if (CONFIG_ARC_MMU_VER == 3)
aux_tag = ARC_AUX_DC_PTAG;
#endif
}
sz += paddr & ~CACHE_LINE_MASK; sz += paddr & ~CACHE_LINE_MASK;
paddr &= CACHE_LINE_MASK; paddr &= CACHE_LINE_MASK;
...@@ -405,7 +389,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long sz, ...@@ -405,7 +389,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long sz,
while (num_lines-- > 0) { while (num_lines-- > 0) {
#if (CONFIG_ARC_MMU_VER == 3) #if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(aux_tag, paddr); write_aux_reg(ARC_AUX_DC_PTAG, paddr);
#endif #endif
write_aux_reg(aux_cmd, paddr); write_aux_reg(aux_cmd, paddr);
paddr += l1_line_sz; paddr += l1_line_sz;
...@@ -458,7 +442,7 @@ static inline void __dc_line_op(unsigned long paddr, unsigned long sz, ...@@ -458,7 +442,7 @@ static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
{ {
unsigned int ctrl_reg = __before_dc_op(cacheop); unsigned int ctrl_reg = __before_dc_op(cacheop);
__cache_line_loop(paddr, sz, cacheop); __dcache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop, ctrl_reg); __after_dc_op(cacheop, ctrl_reg);
} }
#else #else
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment