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Commit b545a98f authored by Poddar, Sourav's avatar Poddar, Sourav Committed by Tom Rini
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spi: ti_qspi: Add delay for successful bulk erase.


Bulk erase is not happening properly on dra7 due to erase timing constraints,
add a delay so that erase timing constraints are properly met.

Signed-off-by: default avatarSourav Poddar <sourav.poddar@ti.com>
Tested-by: default avatarYebio Mesfin <ymesfin@ti.com>
parent d3289aac
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...@@ -314,6 +314,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, ...@@ -314,6 +314,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
qslave->cmd |= QSPI_RD_SNGL; qslave->cmd |= QSPI_RD_SNGL;
debug("rx cmd %08x dc %08x\n", debug("rx cmd %08x dc %08x\n",
qslave->cmd, qslave->dc); qslave->cmd, qslave->dc);
#ifdef CONFIG_DRA7XX
udelay(500);
#endif
writel(qslave->cmd, &qslave->base->cmd); writel(qslave->cmd, &qslave->base->cmd);
status = readl(&qslave->base->status); status = readl(&qslave->base->status);
timeout = QSPI_TIMEOUT; timeout = QSPI_TIMEOUT;
......
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