Merge git://git.denx.de/u-boot-imx

arch/arm/Kconfig

@@ -1373,7 +1373,7 @@ source "arch/arm/Kconfig.debug"
 endmenu
 
 config SPL_LDSCRIPT
-        default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if ARCH_MX23 || ARCH_MX28
+        default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
         default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
 	default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
 

arch/arm/cpu/arm926ejs/mxs/Makefile

@@ -14,8 +14,8 @@ obj-y	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
 endif
 
 # Specify the target for use in elftosb call
-MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage.mx23.cfg
-MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage.mx28.cfg
+MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx23.cfg
+MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx28.cfg
 
 # Generate HAB-capable IVT
 #

arch/arm/cpu/arm926ejs/mxs/mxs.c

@@ -24,7 +24,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* Lowlevel init isn't used on i.MX28, so just have a dummy here */
-void lowlevel_init(void) {}
+__weak void lowlevel_init(void) {}
 
 void reset_cpu(ulong ignored) __attribute__((noreturn));
 
@@ -178,8 +178,7 @@ const char *get_imx_type(u32 imxtype)
 int print_cpuinfo(void)
 {
 	u32 cpurev;
-	struct mxs_spl_data *data = (struct mxs_spl_data *)
-		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
+	struct mxs_spl_data *data = MXS_SPL_DATA;
 
 	cpurev = get_cpu_rev();
 	printf("CPU:   Freescale i.MX%s rev%d.%d at %d MHz\n",
@@ -277,8 +276,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 
 int mxs_dram_init(void)
 {
-	struct mxs_spl_data *data = (struct mxs_spl_data *)
-		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
+	struct mxs_spl_data *data = MXS_SPL_DATA;
 
 	if (data->mem_dram_size == 0) {
 		printf("MXS:\n"

arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg

+DISPLAYPROGRESS
+SECTION 0x0 BOOTABLE
+ TAG LAST
+ LOAD     0x1000     spl/u-boot-spl.bin
+ CALL     0x1000     0x0

arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg

+DISPLAYPROGRESS
+SECTION 0x0 BOOTABLE
+ TAG LAST
+ LOAD     0x1000     spl/u-boot-spl.bin
+ LOAD IVT 0x8000     0x1000
+ CALL HAB 0x8000     0x0

arch/arm/cpu/arm926ejs/mxs/spl_boot.c

@@ -120,8 +120,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
 			 const iomux_cfg_t *iomux_setup,
 			 const unsigned int iomux_size)
 {
-	struct mxs_spl_data *data = (struct mxs_spl_data *)
-		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
+	struct mxs_spl_data *data = MXS_SPL_DATA;
 	uint8_t bootmode = mxs_get_bootmode_index();
 	gd = &gdata;
 
@@ -147,6 +146,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
 	}
 }
 
+#ifndef CONFIG_SPL_FRAMEWORK
 /* Support aparatus */
 inline void board_init_f(unsigned long bootflag)
 {
@@ -159,3 +159,4 @@ inline void board_init_r(gd_t *id, ulong dest_addr)
 	for (;;)
 		;
 }
+#endif

arch/arm/cpu/arm926ejs/start.S

@@ -105,9 +105,9 @@ flush_dcache:
 	/*
 	 * Go setup Memory and board specific bits prior to relocation.
 	 */
-	mov	ip, lr		/* perserve link reg across call */
+	mov	r4, lr		/* perserve link reg across call */
 	bl	lowlevel_init	/* go setup pll,mux,memory */
-	mov	lr, ip		/* restore link */
+	mov	lr, r4		/* restore link */
 #endif
 	mov	pc, lr		/* back to my caller */
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */

arch/arm/cpu/u-boot-spl.lds

@@ -21,6 +21,7 @@ SECTIONS
 		*(.vectors)
 		CPUDIR/start.o (.text*)
 		*(.text*)
+		*(.glue*)
 	}
 
 	. = ALIGN(4);

arch/arm/dts/imx6ul-opos6ul.dtsi

 /*
- * Copyright 2017 Armadeus Systems <support@armadeus.com>
+ * Copyright 2018 Armadeus Systems <support@armadeus.com>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -99,6 +99,7 @@
 
 /* eMMC */
 &usdhc1 {
+	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc1>;
 	bus-width = <8>;
@@ -161,6 +162,7 @@
 	};
 
 	pinctrl_usdhc1: usdhc1grp {
+		u-boot,dm-spl;
 		fsl,pins = <
 			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059
 			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059

arch/arm/dts/imx6ul-opos6uldev.dts

@@ -228,6 +228,7 @@
 };
 
 &uart1 {
+	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;
 	status = "okay";
@@ -373,6 +374,7 @@
 	};
 
 	pinctrl_uart1: uart1grp {
+		u-boot,dm-spl;
 		fsl,pins = <
 			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
 			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1

arch/arm/dts/imx6ul.dtsi

@@ -194,6 +194,7 @@
 				#size-cells = <1>;
 				reg = <0x02000000 0x40000>;
 				ranges;
+				u-boot,dm-spl;
 
 				ecspi1: ecspi@02008000 {
 					#address-cells = <1>;

arch/arm/include/asm/arch-mx6/opos6ul.h

@@ -9,8 +9,4 @@
 
 int opos6ul_board_late_init(void);
 
-#ifdef CONFIG_SPL_BUILD
-void opos6ul_setup_uart_debug(void);
-#endif
-
 #endif

arch/arm/include/asm/arch-mxs/sys_proto.h

@@ -85,6 +85,8 @@ static const struct mxs_pair mxs_boot_modes[] = {
 #define MXS_BM_SDMMC1_3V3		0x0a
 #define MXS_BM_SDMMC1_1V8		0x1a
 
+#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_SYS_TEXT_BASE - 0x200))
+
 struct mxs_spl_data {
 	uint8_t		boot_mode_idx;
 	uint32_t	mem_dram_size;

arch/arm/include/asm/mach-imx/iomux-v3.h

@@ -147,10 +147,10 @@ typedef u64 iomux_v3_cfg_t;
 
 #define PAD_CTL_ODE		(1 << 11)
 
-#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
-#define PAD_CTL_SPEED_LOW	(0 << 6)
-#else
+#if defined(CONFIG_MX6SL)
 #define PAD_CTL_SPEED_LOW	(1 << 6)
+#else
+#define PAD_CTL_SPEED_LOW	(0 << 6)
 #endif
 #define PAD_CTL_SPEED_MED	(2 << 6)
 #define PAD_CTL_SPEED_HIGH	(3 << 6)

arch/arm/mach-imx/mx6/Kconfig

@@ -73,6 +73,10 @@ config MX6UL_OPOS6UL
 	select DM_MMC
 	select DM_THERMAL
 	select SUPPORT_SPL
+	select SPL_DM if SPL
+	select SPL_OF_CONTROL if SPL
+	select SPL_SEPARATE_BSS if SPL
+	select SPL_PINCTRL if SPL
 
 config MX6ULL
 	select SYS_L2CACHE_OFF

arch/arm/mach-imx/mx6/opos6ul.c

 /*
- * Copyright (C) 2017 Armadeus Systems
+ * Copyright (C) 2018 Armadeus Systems
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -9,15 +9,12 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
-#include <asm/arch/mx6ul_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/io.h>
 #include <common.h>
 #include <environment.h>
-#include <fsl_esdhc.h>
-#include <mmc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -138,12 +135,6 @@ int board_late_init(void)
 	return opos6ul_board_late_init();
 }
 
-int board_mmc_getcd(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-	return cfg->esdhc_base == USDHC1_BASE_ADDR;
-}
-
 int dram_init(void)
 {
 	gd->ram_size = imx_ddr_size();
@@ -153,32 +144,9 @@ int dram_init(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
-#include <asm/arch/opos6ul.h>
 #include <linux/libfdt.h>
 #include <spl.h>
 
-#define USDHC_PAD_CTRL (                                       \
-	PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_MED | \
-	PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST                   \
-)
-
-struct fsl_esdhc_cfg usdhc_cfg[1] = {
-	{USDHC1_BASE_ADDR, 0, 8},
-};
-
-static iomux_v3_cfg_t const usdhc1_pads[] = {
-	MX6_PAD_SD1_CLK__USDHC1_CLK        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD1_CMD__USDHC1_CMD        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD1_DATA0__USDHC1_DATA0    | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD1_DATA1__USDHC1_DATA1    | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD1_DATA2__USDHC1_DATA2    | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD1_DATA3__USDHC1_DATA3    | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_NAND_READY_B__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_NAND_CE0_B__USDHC1_DATA5   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_NAND_CE1_B__USDHC1_DATA6   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_NAND_CLE__USDHC1_DATA7     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
 static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
 	.grp_addds = 0x00000030,
 	.grp_ddrmode_ctl = 0x00020000,
@@ -240,11 +208,14 @@ static struct mx6_ddr3_cfg mem_ddr = {
 	.trasmin = 3750,
 };
 
-int board_mmc_init(bd_t *bis)
+void board_boot_order(u32 *spl_boot_list)
 {
-	imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
-	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+	unsigned int bmode = readl(&src_base->sbmr2);
+
+	if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
+		spl_boot_list[0] = BOOT_DEVICE_UART;
+	else
+		spl_boot_list[0] = spl_boot_device();
 }
 
 static void ccgr_init(void)
@@ -282,6 +253,11 @@ static void spl_dram_init(void)
 	mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
 }
 
+void spl_board_init(void)
+{
+	preloader_console_init();
+}
+
 void board_init_f(ulong dummy)
 {
 	ccgr_init();
@@ -292,10 +268,6 @@ void board_init_f(ulong dummy)
 	/* setup GP timer */
 	timer_init();
 
-	/* UART clocks enabled and gd valid - init serial console */
-	opos6ul_setup_uart_debug();
-	preloader_console_init();
-
 	/* DDR initialization */
 	spl_dram_init();
 }

board/armadeus/opos6uldev/board.c

 /*
- * Copyright (C) 2017 Armadeus Systems
+ * Copyright (C) 2018 Armadeus Systems
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <asm/arch/clock.h>
 #include <asm/arch/mx6-pins.h>
-#include <asm/arch/opos6ul.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
@@ -104,20 +103,3 @@ int opos6ul_board_late_init(void)
 
 	return 0;
 }
-
-#ifdef CONFIG_SPL_BUILD
-#define UART_PAD_CTRL (						\
-	PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |	\
-	PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST			\
-)
-
-static iomux_v3_cfg_t const uart1_pads[] = {
-	MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-void opos6ul_setup_uart_debug(void)
-{
-	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-#endif /* CONFIG_SPL_BUILD */

board/freescale/mx7dsabresd/MAINTAINERS

@@ -4,4 +4,3 @@ S:	Maintained
 F:	board/freescale/mx7dsabresd
 F:	include/configs/mx7dsabresd.h
 F:	configs/mx7dsabresd_defconfig
-F:	configs/mx7dsabresd_secure_defconfig

board/warp7/Kconfig

@@ -6,4 +6,18 @@ config SYS_BOARD
 config SYS_CONFIG_NAME
 	default "warp7"
 
+config WARP7_ROOT_PART
+	int "Partition number to use for root filesystem"
+	default 2
+	help
+	  The partition number to use for root filesystem this is the
+	  partition that is typically specified with root=/dev/sdaX or
+	  which gets converted into a root=PARTUUID=some_uuid.
+
+config SYS_FDT_ADDR
+	hex "FDT load address"
+	default 0x83000000
+	help
+	  The address the FDT file should be loaded to.
+
 endif

board/warp7/MAINTAINERS

@@ -4,4 +4,3 @@ S:	Maintained
 F:	board/warp7/
 F:	include/configs/warp7.h
 F:	configs/warp7_defconfig
-F:	configs/warp7_secure_defconfig