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Commit 8f362dbb authored by Philipp Tomsich's avatar Philipp Tomsich
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rockchip: rk3368: dts: add sgrf node


We will to drop device security temporarily (until the ATF initialises
it fully) from the TPL/SPL stage: this requires access to some
registers in the SGRF.

This adds the sgrf node to the rk3368.dtsi, so we can then bind a
syscon device onto it and access its memory ranges.

Signed-off-by: default avatarPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
parent c1828cf7
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...@@ -652,6 +652,11 @@ ...@@ -652,6 +652,11 @@
reg = <0x0 0xff738000 0x0 0x1000>; reg = <0x0 0xff738000 0x0 0x1000>;
}; };
sgrf: syscon@ff740000 {
compatible = "rockchip,rk3368-sgrf", "syscon";
reg = <0x0 0xff740000 0x0 0x1000>;
};
cru: clock-controller@ff760000 { cru: clock-controller@ff760000 {
compatible = "rockchip,rk3368-cru"; compatible = "rockchip,rk3368-cru";
reg = <0x0 0xff760000 0x0 0x1000>; reg = <0x0 0xff760000 0x0 0x1000>;
......
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