Skip to content
Snippets Groups Projects
Commit 7c10c572 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Nobuhiro Iwamatsu
Browse files

sh: Add support for SH7720 in serial_sh driver.


Signed-off-by: default avatarYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: default avatarNobuhiro Iwamatsu <iwamatsu@nigauri.org>
parent f9913a8e
No related branches found
No related tags found
No related merge requests found
...@@ -30,6 +30,17 @@ ...@@ -30,6 +30,17 @@
#error "Default SCIF doesn't set....." #error "Default SCIF doesn't set....."
#endif #endif
#if defined(CONFIG_SH3)
/* There are SH7720's register */
#define SCSMR (volatile unsigned short *)(SCIF_BASE + 0x0)
#define SCBRR (volatile unsigned char *)(SCIF_BASE + 0x4)
#define SCSCR (volatile unsigned short *)(SCIF_BASE + 0x8)
#define SCFSR (volatile unsigned short *)(SCIF_BASE + 0x14) /* SCSSR */
#define SCFCR (volatile unsigned short *)(SCIF_BASE + 0x18)
#define SCFDR (volatile unsigned short *)(SCIF_BASE + 0x1C)
#define SCFTDR (volatile unsigned char *)(SCIF_BASE + 0x20)
#define SCFRDR (volatile unsigned char *)(SCIF_BASE + 0x24)
#else
#define SCSMR (vu_short *)(SCIF_BASE + 0x0) #define SCSMR (vu_short *)(SCIF_BASE + 0x0)
#define SCBRR (vu_char *)(SCIF_BASE + 0x4) #define SCBRR (vu_char *)(SCIF_BASE + 0x4)
#define SCSCR (vu_short *)(SCIF_BASE + 0x8) #define SCSCR (vu_short *)(SCIF_BASE + 0x8)
...@@ -38,16 +49,21 @@ ...@@ -38,16 +49,21 @@
#define SCFRDR (vu_char *)(SCIF_BASE + 0x14) #define SCFRDR (vu_char *)(SCIF_BASE + 0x14)
#define SCFCR (vu_short *)(SCIF_BASE + 0x18) #define SCFCR (vu_short *)(SCIF_BASE + 0x18)
#define SCFDR (vu_short *)(SCIF_BASE + 0x1C) #define SCFDR (vu_short *)(SCIF_BASE + 0x1C)
#endif
#if defined(CONFIG_SH4A) #if defined(CONFIG_SH4A)
#define SCRFDR (vu_short *)(SCIF_BASE + 0x20) #define SCRFDR (vu_short *)(SCIF_BASE + 0x20)
#define SCSPTR (vu_short *)(SCIF_BASE + 0x24) #define SCSPTR (vu_short *)(SCIF_BASE + 0x24)
#define SCLSR (vu_short *)(SCIF_BASE + 0x28) #define SCLSR (vu_short *)(SCIF_BASE + 0x28)
#define SCRER (vu_short *)(SCIF_BASE + 0x2C) #define SCRER (vu_short *)(SCIF_BASE + 0x2C)
#define LSR_ORER 1
#elif defined (CONFIG_SH4) #elif defined (CONFIG_SH4)
#define SCSPTR (vu_short *)(SCIF_BASE + 0x20) #define SCSPTR (vu_short *)(SCIF_BASE + 0x20)
#define SCLSR (vu_short *)(SCIF_BASE + 0x24) #define SCLSR (vu_short *)(SCIF_BASE + 0x24)
#define LSR_ORER 1
#elif defined (CONFIG_SH3) #elif defined (CONFIG_SH3)
#define SCLSR (vu_short *)(SCIF_BASE + 0x24) #define SCLSR SCFSR /* SCSSR */
#define LSR_ORER 0x0200
#endif #endif
#define SCR_RE (1 << 4) #define SCR_RE (1 << 4)
...@@ -67,10 +83,18 @@ ...@@ -67,10 +83,18 @@
void serial_setbrg (void) void serial_setbrg (void)
{ {
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_CPU_SH7720)
int divisor = gd->baudrate * 16;
*SCBRR = (CONFIG_SYS_CLK_FREQ * 2 + (divisor / 2)) /
(gd->baudrate * 32) - 1;
#else
int divisor = gd->baudrate * 32; int divisor = gd->baudrate * 32;
*SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) / *SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) /
(gd->baudrate * 32) - 1; (gd->baudrate * 32) - 1;
#endif
} }
int serial_init (void) int serial_init (void)
...@@ -133,7 +157,6 @@ int serial_tstc (void) ...@@ -133,7 +157,6 @@ int serial_tstc (void)
#define FSR_ERR_CLEAR 0x0063 #define FSR_ERR_CLEAR 0x0063
#define RDRF_CLEAR 0x00fc #define RDRF_CLEAR 0x00fc
#define LSR_ORER 1
void handle_error( void ){ void handle_error( void ){
(void)*SCFSR ; (void)*SCFSR ;
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment