imx: imx6ull: adjust the ldo 1.2v bandgap voltage

Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage
is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop
MISC0 bit[6:4]) setting to 2b'110.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

arch/arm/cpu/armv7/mx6/soc.c

@@ -314,6 +314,12 @@ static void init_bandgap(void)
 	 * be set.
 	 */
 	writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+	/*
+	 * On i.MX6ULL, the LDO 1.2V bandgap voltage is 30mV higher. so set
+	 * VBGADJ bits to 2b'110 to adjust it.
+	 */
+	if (is_mx6ull())
+		writel(BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ, &anatop->ana_misc0_set);
 }
 
 

arch/arm/include/asm/arch-mx6/crm_regs.h

@@ -1271,6 +1271,7 @@ struct mxc_ccm_reg {
 	(((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC)
 
 #define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008
+#define BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ 0x60
 
 #define BM_PMU_MISC2_AUDIO_DIV_MSB (1 << 23)
 #define BP_PMU_MISC2_AUDIO_DIV_MSB 23