FSL DDR: Remove old SPD support from cpu/mpc85xx

All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

cpu/mpc85xx/Makefile

@@ -35,15 +35,12 @@ COBJS-$(CONFIG_MP) += mp.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
 
 # supports ddr1
-ifeq ($(CONFIG_FSL_DDR1),y)
 COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
 COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
 COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
 COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
-endif
 
 # supports ddr1/2
-ifeq ($(CONFIG_FSL_DDR2),y)
 COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
 COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
 COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
@@ -51,15 +48,6 @@ COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
 # supports ddr1/2/3
 COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
-endif
-
-ifneq ($(CONFIG_FSL_DDR3),y)
-ifneq ($(CONFIG_FSL_DDR2),y)
-ifneq ($(CONFIG_FSL_DDR1),y)
-COBJS-y	+= spd_sdram.o
-endif
-endif
-endif
 
 COBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
 	  pci.o serial_scc.o commproc.o ether_fcc.o qe_io.o \

include/configs/TQM85xx.h

@@ -137,6 +137,10 @@
 #define CFG_DDR_SDRAM_BASE	0x00000000	/* DDR is system memory	*/
 #define CFG_SDRAM_BASE		CFG_DDR_SDRAM_BASE
 
+#define CONFIG_NUM_DDR_CONTROLLERS	1
+#define CONFIG_DIMM_SLOTS_PER_CTLR	1
+#define CONFIG_CHIP_SELECTS_PER_CTRL	2
+
 #if defined(CONFIG_TQM8540) || defined(CONFIG_TQM8560)
 /* TQM8540 & 8560 need DLL-override */
 #define CONFIG_DDR_DLL				/* DLL fix needed	*/