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/*
* Copyright (C) 2013 Boundary Devices
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
/* NC YET */
#define MX6_MMDC_P0_MPDGCTRL0_VAL 0x420F020F
#define MX6_MMDC_P0_MPDGCTRL1_VAL 0x01760175
#define MX6_MMDC_P1_MPDGCTRL0_VAL 0x41640171
#define MX6_MMDC_P1_MPDGCTRL1_VAL 0x015E0160
#define MX6_MMDC_P0_MPRDDLCTL_VAL 0x45464B4A
#define MX6_MMDC_P1_MPRDDLCTL_VAL 0x49484A46
#define MX6_MMDC_P0_MPWRDLCTL_VAL 0x40402E32
#define MX6_MMDC_P1_MPWRDLCTL_VAL 0x3A3A3231
#define MX6_MMDC_P0_MPWLDECTRL0_VAL 0x003A003A
#define MX6_MMDC_P0_MPWLDECTRL1_VAL 0x0030002F
#define MX6_MMDC_P1_MPWLDECTRL0_VAL 0x002F0038
#define MX6_MMDC_P1_MPWLDECTRL1_VAL 0x00270039
#define WALAT 1
#include "../common/mx6/ddr-setup.cfg"
#define RANK 0
#define BUS_WIDTH 64
/* H5TC2G63FFR-PBA */
#include "../common/mx6/800mhz_128mx16.cfg"
#include "../common/mx6/clocks.cfg"